Booting from big core (Cortex-A15), instead of little one (CA7)

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Heesub Shin
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Booting from big core (Cortex-A15), instead of little one (CA7)

Unread post by Heesub Shin » Wed Jan 15, 2020 2:19 pm

Hi folks,

Is there a way to change the boot cpu from Cortex-A7 to Cortex-A15 in Odroid-XU3/4? I am struggling to make a non-Linux operating system run on Odroid-XU3/4. Unlike Linux, the OS I am working on assumes that it always boot from the first physical CPU and does not have a logical mapping that translates logical to physical. So, it is a headache to make it SMP capable.

I've already tried to change the boot cpu at U-BOOT level, turning on Cortex-A15 (Cluster #0, CPU #0) and then powered down the Cortex-A7 (Cluster #1, CPU #0). It seemed to work well until turning on the Cortex-A7 again. Once turned it on again, Cortex-A7 which was powered-off before goes hang, looping around the non-secure code at nscode_base (@0x02073000) and waiting for C2 Address. iROM code seems to have some assumption that Cortex-A7 (#1, #0) never gets turned off. Looking at Linux kernel source, if I understood correctly, it seems that the boot cpu (logical CPU #0) never get turned off and only can be suspended.

@Hardkernel, do you have any idea on this? Is it possible to remove the pull-up at GPG2[1]?

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Re: Booting from big core (Cortex-A15), instead of little one (CA7)

Unread post by Heesub Shin » Wed Jan 15, 2020 2:33 pm

@Hardkernel, where can I locate R61 and R62 on the PCB?

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Re: Booting from big core (Cortex-A15), instead of little one (CA7)

Unread post by Heesub Shin » Wed Jan 15, 2020 3:16 pm

Found R61 and R62 under the heatsink. After the rework, now Odroid-XU3 boots from Cortex-A15!

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Re: Booting from big core (Cortex-A15), instead of little one (CA7)

Unread post by odroid » Wed Jan 15, 2020 3:24 pm

Sorry for late reply and glad to hear that you made it work!

Can you tell us which portion needed to be changed other than two resistors to boot from the big cores?

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Re: Booting from big core (Cortex-A15), instead of little one (CA7)

Unread post by joy » Fri Jan 17, 2020 1:14 pm

Hi @Heesub Shin,
Also I'm wondering how it works by adjusting R61 and R62. :roll:
The resistors are temperature block voltage of exynos5422.
If you explain the logic for us, it will be very helpful. :)

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