Controlling USB OTG power output?

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asmalldev
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Controlling USB OTG power output?

Post by asmalldev »

Hello all,

I am trying to reduce power consumption of the C2 as much as possible from software/firmware since I plan to run it off a battery.

My setup includes several USB peripherals (odroid wifi module + some usb cameras) as well as the VU7+ display connected the over HDMI + USB OTG.

I want to selectively turn off/on power to these peripherals when my application doesn't need them in order to save power.

Turning off the USBA Host ports is possible with the sysfs gpio interface:

Code: Select all

echo 126 > /sys/class/gpio/export
echo out > /sys/class/gpio/gpio126/direction
echo 0 > /sys/class/gpio/gpio126/value       # OFF
echo 1 > /sys/class/gpio/gpio126/value       # ON
This makes sense looking at the C2's USB Hub schematic, which shows that GPIOAO_BIT4 is connected to the reset pin on the USB hub controller:
USBA_TOP_SCHEM.png
USBA_TOP_SCHEM.png (37.82 KiB) Viewed 2105 times
Looking at the information in sysfs I can see that gpiochip122 manages the ao-bank pins, with base 122, and there are 14 pins in the bank:

Code: Select all

# cat /sys/class/gpio/gpiochip122/label
ao-bank

# cat /sys/class/gpio/gpiochip122/base
122

# cat /sys/class/gpio/gpiochip122/ngpio
14
There are 14 GPIOAO_ pins according the Amlogic S905 datasheet. I reason that GPIOAO_4 is the 4th pin, and starting from the base 122 + 4 gives us 126.


So far so good. But the VU7+ display is what's drawing the most current, and it's connected to the micro USB OTG, not the USB A host port.

Going back to the schematic, GPIOAO_5 is connected to the power enable pin on the USB OTG:
USBOTG_TOP_SCHEM.png
USBOTG_TOP_SCHEM.png (18.31 KiB) Viewed 2105 times
This would make pin 127 the pin to control this line and perhaps to disable the OTG. However, when I try to manage the pin through sysfs, nothing happens.

Code: Select all

echo 127 > /sys/class/gpio/export
# no sysfs entry created
Looking at the kernel's debug info for GPIOs I can see some of the pin's state.

with VU7+ disconnected I can see the pin is low:

Code: Select all

# cat /sys/kernel/debug/gpio
GPIOs 122-135, platform/c1109880.pinmux, ao-bank:
 gpio-125 (amlsd               ) out lo    
 gpio-126 (sysfs               ) out hi    
 gpio-127 (?                   ) out lo    
 gpio-135 (blue:heartbeat      ) out hi    
with VU7+ connected I can see the pin is high:

Code: Select all

# cat /sys/kernel/debug/gpio
GPIOs 122-135, platform/c1109880.pinmux, ao-bank:
 gpio-125 (amlsd               ) out lo    
 gpio-126 (sysfs               ) out hi    
 gpio-127 (?                   ) out hi    
 gpio-135 (blue:heartbeat      ) out hi    
However, when I connect a cut-off micro USB (no device on the other end) and use a meter to measure the current, it reads as 5V but the debug info still says GPIOAO_5 (pin 127) is low.

Digging into the schematic further, I found the OTG, which shows that there is a MOSFET USB control chip, RT9715EGB (datasheet attached):
OTG_SCHEM.png
OTG_SCHEM.png (23.48 KiB) Viewed 2105 times
The power enable/ gpio pin is connected to the power enable pin on the MOSFET. I found the chip on the board, and using my meter I have found some strange behavior. Whether the power enable pin is high or low, the output from the MOSFET is always 5V.

So I'm now wondering:
1) where the enable pin is being switched on in the firmware when a usb device is attached, and
2) what's going on with this MOSFET?

Does anyone have insight on this or how to reduce the consumption of the VU7+? Any help would be appreciated! Thanks :)
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DS9715-03.pdf
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Re: Controlling USB OTG power output?

Post by rooted »

You can try this mod that allows you to lower the VU7+ backlight level if using Android. I'm not sure about a way to lower the C2 power consumption besides removing the jumper which you likely have done so already.

Backlight Mod:
https://wiki.odroid.com/accessory/displ ... th_android

J1 Jumper:
http://odroid.com/dokuwiki/doku.php?id= ... _odroid-c2

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Re: Controlling USB OTG power output?

Post by asmalldev »

Thanks for the response, rooted. I'm aware of the jumper and the PWM modifications for the VU7+. I think I am going to switch to using the VU8 display since it has PWM controlled brightness already built-in.

Additionally, the display board that comes with the VU8 has two separate micro USB ports: one for touch data without 5V power delivery, and one for 5V power only. This will let me use the always-on micro usb on the C2 for the data line (which won't use as much power), then have some separate circuitry to toggle the power to the other micro USB in order to save battery.

Still curious if anyone has a way to toggle the micro's 5V on the C2 :)

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Re: Controlling USB OTG power output?

Post by mad_ady »

Doing a necro-bump, but I too am curious if I can turn off the microusb port - partly for the same reasons - to cut power to a VU7+, but also (on a different board) to reset a usb wifi adapter which sometimes can get stuck...
So far, I don't think it's possible via software, but I hope someone corrects me on this...

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Re: Controlling USB OTG power output?

Post by tobetter »

mad_ady wrote:
Fri May 07, 2021 3:03 am
Doing a necro-bump, but I too am curious if I can turn off the microusb port - partly for the same reasons - to cut power to a VU7+, but also (on a different board) to reset a usb wifi adapter which sometimes can get stuck...
So far, I don't think it's possible via software, but I hope someone corrects me on this...
Not 100% sure yet before I try. In case if you want to use OTG for USB host only, the device tree needs to be rewrittent to control GPIOAO_5 from sysfs or by regulator driver. Currently USB driver controls "GPIOAO_5" whenever the state of OTG detect pin is changed, by replacing GPIOAO_5 to PMU at line 542 will USB driver will not use GPIOAO_5 and it will be able to be exported at sysfs, I think...I guess...
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Re: Controlling USB OTG power output?

Post by mad_ady »

Thank you for the suggestion. Here is how my decompiled dtb looks like:

Code: Select all

    dwc2_a {
        compatible = "amlogic,dwc2";
        reg = <0x00000000 0xc9000000 0x00000000 0x00040000>;
        interrupts = <0x00000000 0x0000001e 0x00000004>;
        status = "okay";
        pl-periph-id = <0x00000000>;
        clock-src = "usb0";
        port-id = <0x00000000>;
        port-type = <0x00000000>;
        port-speed = <0x00000000>;
        port-config = <0x00000000>;
        port-dma = <0x00000000>;
        port-id-mode = <0x00000000>;
        gpio-vbus-power = "GPIOAO_5";
        gpios = <0x00000025 0x00000005 0x00000000>;
        gpio-work-mask = <0x00000001>;
        phy-reg = <0xc0000000>;
        phy-reg-size = <0x00000020>;
        usb-fifo = <0x00000400>;
        cpu-type = "gxbaby";
        resets = <0x0000000d 0x0000003a 0x0000000d 0x00000049 0x0000000d 0x00000035>;
        reset-names = "usb_general", "usb0", "usb0_to_ddr";
    };
So, I installed the kernel source from git (by the way, the kernel compile page for C2 (https://wiki.odroid.com/odroid-c2/softw ... ing_kernel) should have the new branch name: odroidc2-v3.16.y listed).

What do you mean by PMU? I don't see many references to it in the dtbs folder in the kernel source:

Code: Select all

#  grep -R PMU *                                                                                                                                                                    
amlogic/mesongxbb.dtsi:         interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP", "IRQPMU",                        
include/dt-bindings/clock/imx6sx-clock.h:#define IMX6SX_CLK_IPMUX1              165
include/dt-bindings/clock/imx6sx-clock.h:#define IMX6SX_CLK_IPMUX2              166
include/dt-bindings/clock/imx6sx-clock.h:#define IMX6SX_CLK_IPMUX3              167
include/dt-bindings/clock/bcm281xx.h:#define BCM281XX_AON_CCU_PMU_BSC           1
include/dt-bindings/clock/bcm281xx.h:#define BCM281XX_AON_CCU_PMU_BSC_VAR               2
include/dt-bindings/clock/exynos5250.h:#define CLK_PMU                  320
include/dt-bindings/clock/exynos3250.h:#define CLK_PPMULEFT                     130
include/dt-bindings/clock/exynos3250.h:#define CLK_PPMURIGHT                    136
include/dt-bindings/clock/exynos3250.h:#define CLK_PMU_APBIF                    157
include/dt-bindings/clock/exynos3250.h:#define CLK_PPMUCAMIF                    163
include/dt-bindings/clock/exynos3250.h:#define CLK_PPMUMFC_L                    176
include/dt-bindings/clock/exynos3250.h:#define CLK_PPMUG3D                      181
include/dt-bindings/clock/exynos3250.h:#define CLK_PPMULCD0                     185
include/dt-bindings/clock/exynos3250.h:#define CLK_PPMUFILE                     194
include/dt-bindings/clock/exynos4.h:#define CLK_PPMUISPX                355 /* Exynos4x12 only */
include/dt-bindings/clock/exynos4.h:#define CLK_PPMUISPMX               356 /* Exynos4x12 only */

I changed the DTS to include "PMU":

Code: Select all

        dwc2_a {
                compatible = "amlogic,dwc2";
                reg = <0x0 0xc9000000 0x0 0x40000>;
                interrupts = <0 30 4>;
                status = "okay";
                pl-periph-id = <0>;
                clock-src = "usb0";
                port-id = <0>;
                port-type = <0>;
                port-speed = <0>;
                port-config = <0>;
                port-dma = <0>;
                port-id-mode = <0>;
                gpio-vbus-power = "GPIOAO_5";
                gpios = <&gpio_ao PMU GPIO_ACTIVE_HIGH>;
                gpio-work-mask  = <1>;
                phy-reg = <0xc0000000>;
                phy-reg-size = <0x20>;
                usb-fifo = <1024>;
                cpu-type = "gxbaby";
                resets = <&clock GCLK_IDX_USB_GENERAL
                        &clock GCLK_IDX_MISC_USB0_TO_DDR
                        &clock GCLK_IDX_USB0>;
                reset-names = "usb_general",
                        "usb0",
                        "usb0_to_ddr";
        };
And I tried to build the DTB, but failed because it doesn't understand PMU:

Code: Select all


# make dtbs
...
  DTC     arch/arm64/boot/dts/meson64_odroidc2.dtb
Error: arch/arm64/boot/dts/meson64_odroidc2.dts:542.21-22 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [scripts/Makefile.lib:276: arch/arm64/boot/dts/meson64_odroidc2.dtb] Error 1
make: *** [arch/arm64/Makefile:76: dtbs] Error 2
Where whould I start looking for this PMU? Should I try IRQPMU instead?

Thanks again for your help!

Edit: It doesn't like IRQPMU either...

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Re: Controlling USB OTG power output?

Post by tobetter »

@mad_ady, sorry for my bad. Replacing to PMU should be line 542 in my previous post and line 543 can be removed, line 544 also coulbe removed. So like this?

Code: Select all

port-id-mode = <0>;
gpio-vbus-power = "PMU";
phy-reg = <0xc0000000>;
phy-reg-size = <0x20>;
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Re: Controlling USB OTG power output?

Post by mad_ady »

Ok, with the PMU change it worked! Thanks a lot!

The only issue is that by default, on boot, the usbotg starts off and needs to be manually turned on:

Code: Select all

root  ~  #  lsusb                                 [511/582]Bus 001 Device 005: ID 0d8c:000c C-Media Electronics, Inc. Audio Adapter                                                Bus 001 Device 004: ID 148f:5572 Ralink Technology, Corp. RT5572 Wireless Adapter                                       Bus 001 Device 003: ID 0a12:0001 Cambridge Silicon Radio, Ltd Bluetooth Dongle (HCI mode)                               Bus 001 Device 002: ID 05e3:0610 Genesys Logic, Inc. 4-port hub                                                         Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub                                                          Bus 002 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub                                                           root  ~  #                                                  root  ~  #                                                  root  ~  #  echo 127 > /sys/class/gpio/export               root  ~  #  cd /sys/class/gpio/                            export       gpiochip122/ unexport                          gpio127/     gpiochip136/                                    root  ~  #  cd /sys/class/gpio/gpio127
root  .../gpio/gpio127  #  cat direction                   in                                                           root  .../gpio/gpio127  #  echo out > direction             root  .../gpio/gpio127  #  cat value                       0                                                            root  .../gpio/gpio127  #  lsusb                           Bus 001 Device 005: ID 0d8c:000c C-Media Electronics, Inc. Audio Adapter                                                Bus 001 Device 004: ID 148f:5572 Ralink Technology, Corp. RT5572 Wireless Adapter                                       Bus 001 Device 003: ID 0a12:0001 Cambridge Silicon Radio, Ltd Bluetooth Dongle (HCI mode)                               Bus 001 Device 002: ID 05e3:0610 Genesys Logic, Inc. 4-port hub                                                         Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub                                                          Bus 002 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub                                                           root  .../gpio/gpio127  #  echo 1 > value
root  .../gpio/gpio127  #  lsusb                           Bus 001 Device 005: ID 0d8c:000c C-Media Electronics, Inc. Audio Adapter                                                Bus 001 Device 004: ID 148f:5572 Ralink Technology, Corp. RT5572 Wireless Adapter                                       Bus 001 Device 003: ID 0a12:0001 Cambridge Silicon Radio, Ltd Bluetooth Dongle (HCI mode)                               Bus 001 Device 002: ID 05e3:0610 Genesys Logic, Inc. 4-port hub                                                         Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub                                                          Bus 002 Device 002: ID 148f:5572 Ralink Technology, Corp. RT5572 Wireless Adapter                                       Bus 002 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
So, thanks again!
If the same (or a similar) trick works on N2/C4, it should be documented on the wiki. I'm sure some people might need to power-cycle usb devices.
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Re: Controlling USB OTG power output?

Post by mad_ady »

Well, google brings me here back again!
This time, the need is to toggle/reset the USB OTG port of an old C1 (long story why, in a different thread).
I remembered that it was possible for C2, so, why not for C1 as well?
It seems USB OTG is controlled by GPIOAO5:

Code: Select all

    usb_con {
        lm-compatible = "logicmodule-bus";
        usb_b {
            lm-compatible = "amlogic,usb";
            lm-periph-id = <0x00000001>;
            clock-src = "usb1";
            port-id = <0x00000001>;
            port-type = <0x00000001>;
            port-speed = <0x00000000>;
            port-config = <0x00000000>;
            port-dma = <0x00000000>;
            port-id-mode = <0x00000001>;
            gpio-hub-rst = "GPIOAO_4";
            status = "okay";
        };
        usb_a {
            lm-compatible = "amlogic,usb";
            lm-periph-id = <0x00000000>;
            clock-src = "usb0";
            port-id = <0x00000000>;
            port-type = <0x00000000>;
            port-speed = <0x00000000>;
            port-config = <0x00000000>;
            port-dma = <0x00000000>;
            port-id-mode = <0x00000000>;
            gpio-vbus-power = "GPIOAO_5";
            gpio-work-mask = <0x00000001>;
            status = "okay";
        };
    };
But the kernel won't let me export it, so I can't toggle it.
I've tried the same trick - put gpio-vbus-power = "PMU", and now I can export GPIO 5 and toggle it. However, the port doesn't seem to reset/lose power.

Code: Select all

# fdtget /media/boot/meson8b_odroidc.dtb /usb_con/usb_a gpio-vbus-power
GPIOAO_5
# fdtput -t s /media/boot/meson8b_odroidc.dtb /usb_con/usb_a gpio-vbus-power PMU
# reboot
...
# cat /sys/kernel/debug/gpio
GPIOs 0-138:
 gpio-3   (amlsd               ) out lo
 gpio-13  (blue:heartbeat      ) out hi
 gpio-49  (amlsd               ) in  hi
 gpio-83  (amlw1               ) in  lo
The GPIOAO_5 feeds into PWREN pin of the USBOTG. Any idea why I can't toggle it?
I'm running Ubuntu 20.04 with the old 3.10 kernel on this C1.
Thanks!

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Re: Controlling USB OTG power output?

Post by mad_ady »

Just a message for my future self - I am able to power-cycle the USB-OTG port on the C1 with uhubctl:

Code: Select all

$ sudo ./uhubctl -a off -l 2
Current status for hub 2 [1d6b:0002 Linux 3.10.107-25 dwc_otg_hcd DWC OTG Controller lm0, USB 2.00, 1 ports, ppps]
  Port 1: 0503 power highspeed enable connect [2717:4ee7 Xiaomi SDM660-MTP _SN:8E39ACD6 c9b0f53]
Sent power off request
New status for hub 2 [1d6b:0002 Linux 3.10.107-25 dwc_otg_hcd DWC OTG Controller lm0, USB 2.00, 1 ports, ppps]
  Port 1: 0400 highspeed

$ sudo ./uhubctl -a on -l 2
Current status for hub 2 [1d6b:0002 Linux 3.10.107-25 dwc_otg_hcd DWC OTG Controller lm0, USB 2.00, 1 ports, ppps]
  Port 1: 0400 highspeed
Sent power on request
New status for hub 2 [1d6b:0002 Linux 3.10.107-25 dwc_otg_hcd DWC OTG Controller lm0, USB 2.00, 1 ports, ppps]
  Port 1: 0101 power connect [2717:4ee7]

It takes about 5s, which is slow, but hey...

Code: Select all

[ 4727.571127] WARN::dwc_otg_hcd_hub_control:3067: DWC OTG HCD - Unknown hub control request type or invalid typeReq: 8006h wIndex: 0h wValue: f00h

[ 4727.571506] WARN::dwc_otg_hcd_hub_control:3067: DWC OTG HCD - Unknown hub control request type or invalid typeReq: 8006h wIndex: 0h wValue: f00h

[ 4727.571667] WARN::dwc_otg_hcd_hub_control:3067: DWC OTG HCD - Unknown hub control request type or invalid typeReq: 8006h wIndex: 0h wValue: f00h

[ 4727.572026] WARN::dwc_otg_hcd_hub_control:3067: DWC OTG HCD - Unknown hub control request type or invalid typeReq: 8006h wIndex: 0h wValue: f00h

[ 4727.576866] NYET/NAK/ACK/other in non-error case, 0x00000002
[ 4728.579175] NYET/NAK/ACK/other in non-error case, 0x00000002
[ 4729.578990] NYET/NAK/ACK/other in non-error case, 0x00000002
[ 4732.588031] NYET/NAK/ACK/other in non-error case, 0x00000002
[ 4733.589888] NYET/NAK/ACK/other in non-error case, 0x00000002
[ 4734.591982] NYET/NAK/ACK/other in non-error case, 0x00000002
[ 4735.602684] ERROR::dwc_otg_hcd_urb_enqueue:566: USB Connect status change processing

[ 4735.602979] usb 2-1: usbfs: usb_submit_urb returned -19
[ 4735.603838] ERROR::dwc_otg_hcd_urb_enqueue:566: USB Connect status change processing

[ 4735.604095] usb 2-1: usbfs: usb_submit_urb returned -19
[ 4735.604987] ERROR::dwc_otg_hcd_urb_enqueue:566: USB Connect status change processing

[ 4735.605297] usb 2-1: usbfs: usb_submit_urb returned -19
[ 4735.791355] usb 2-1: USB disconnect, device number 78
[ 4735.951465] Indeed it is in host mode hprt0 = 00021501
[ 4736.131411] usb 2-1: new high-speed USB device number 79 using dwc_otg
[ 4736.132675] Indeed it is in host mode hprt0 = 00001101
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Re: Controlling USB OTG power output?

Post by rooted »

Nice find, don't you love when Google leads you to an old post which belongs to you.

I've had it happen several times but in my case I had forgotten ever posting the op, old age...

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Re: Controlling USB OTG power output?

Post by mad_ady »

Yes! It's serendipity!

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