Android PIE 32-bit development stopped?

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OverSoft
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Android PIE 32-bit development stopped?

Post by OverSoft »

Hi,

We have quite a few N2's (hundreds) at clients which we update OTA with the official PIE 32-bit update packages by Odroid (by using our own automatic update app).
Over the past few months, there have been quite a few updates to the 64-bit OS version, but none to the 32-bit OS version.

Since we're using the N2 in 20 different countries, all without user-interaction, we can't upgrade to 64-bit, since this can not be done OTA (as far as I know).

Has development completely stopped for the 32-bit version?

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Re: Android PIE 32-bit development stopped?

Post by odroid »

Right. We have no plan to update the 32bit version since most users switched to much more efficient 64bit version.

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Re: Android PIE 32-bit development stopped?

Post by OverSoft »

Is there no way to update to 64-bit OTA? Because this would be very bad news for us...

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Re: Android PIE 32-bit development stopped?

Post by tobetter »

OverSoft wrote:
Thu Sep 10, 2020 4:09 pm
Is there no way to update to 64-bit OTA? Because this would be very bad news for us...
Can you share how you triggers the auto update on the remote device?

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Re: Android PIE 32-bit development stopped?

Post by OverSoft »

We built our own deployment system.
It basically means we put the update zip somewhere, put a file named /cache/recovery/command in place with the command to update using that ZIP and then issue an "reboot recovery" command.

We do this to not be dependant on the odroid infrastructure to redistribute the updates. (Which depending on the client, would not even be accessible from inside their network)

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Re: Android PIE 32-bit development stopped?

Post by tobetter »

OverSoft wrote:
Thu Sep 10, 2020 4:36 pm
We built our own deployment system.
It basically means we put the update zip somewhere, put a file named /cache/recovery/command in place with the command to update using that ZIP and then issue an "reboot recovery" command.

We do this to not be dependant on the odroid infrastructure to redistribute the updates. (Which depending on the client, would not even be accessible from inside their network)
Does the ZIP file is compatible to Android recovery? If so, I guess you can build your 64bit custom recovery ZIP file and download to your remote device to trigger update. As long as the recovery system can flash the OS image, it will turns to 64 bit Android from 32 bit. That's my guess and I believe it's worth to try.

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Re: Android PIE 32-bit development stopped?

Post by OverSoft »

No, unfortunately that doesn't work. I suspect it's an incompatibility with the boot loader and the kernel. Or the recovery mode and the kernel.
After updating, even whilst clearing the data and cache, the N2 just keeps sitting in uboot (on the serial port) waiting for a command after failing to boot the kernel. (While the Hardkernel logo is showing)

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Re: Android PIE 32-bit development stopped?

Post by tobetter »

OverSoft wrote:
Thu Sep 10, 2020 4:49 pm
No, unfortunately that doesn't work. I suspect it's an incompatibility with the boot loader and the kernel. Or the recovery mode and the kernel.
After updating, even whilst clearing the data and cache, the N2 just keeps sitting in uboot (on the serial port) waiting for a command after failing to boot the kernel. (While the Hardkernel logo is showing)
Can you share the U-boot log and did you modify the recovery script?
Once N2 switched to Android recovery system, actually it can flash everything as described in the recovery script.

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Re: Android PIE 32-bit development stopped?

Post by OverSoft »

No, I just used the standard update zip provided on wiki.odroid.com.

I flash using:
boot-recovery
--update_package=path/to/update.zip
--wipe_cache

(I also tried with --wipe_data, doesn't make a difference, it doesn't even get that far whilst booting)

I don't have my UART to USB device here, but I can send the uboot log later today.

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Re: Android PIE 32-bit development stopped?

Post by OverSoft »

Installed a clean version of the 32-bit PIE version 20200520.
Dropped updatepackage-odroidn2-64bit-20200903.zip on /sdcard
Setup /cache/recovery/command to update from that zip.
Issue a 'svc power reboot recovery'

The installation goes through like any update.

After that, it reboots and this is the log directly after the recovery reboot:

Code: Select all

G12B:BL:6e7c85:7898ac;FEAT:E0F83180:2000;POC:F;RCY:0;EMMC:0;READ:0;0.4
                                                                      bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0000 - pwm id 0x01
bl2_stage_init 0xc1
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:00008067
L3:04000000
B2:00002000
B1:e0f83180

TE: 116382

BL2 Built : 06:17:13, Jun 28 2019. g12b gf0505d7-dirty - qi.duan@droid13

Board ID = 4
Set A53 clk to 24M
Set A73 clk to 24M
Set clk81 to 24M
A53 clk: 1200 MHz
A73 clk: 1200 MHz
CLK81: 166.6M
smccc: 00020ed5
eMMC boot @ 0
sw8 s
DDR driver_vesion: LPDDR4_PHY_V_0_1_14 build time: Jun 28 2019 06:17:09
board id: 4
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
fw parse done
Load ddrfw from eMMC, src: 0x00030200, des: 0xfffd0000, size: 0x0000c000, part: 0
Load ddrfw from eMMC, src: 0x0002c200, des: 0xfffd0000, size: 0x00004000, part: 0
PIEI prepare done
fastboot data load
00000000
emmc switch 1 ok
00000000
emmc switch 2 ok
fastboot data verify
verify result: 255
Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
DDR4 probe
ddr clk to 1320MHz
Load ddrfw from eMMC, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 0
00000000
emmc switch 0 ok
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of Write leveling coarse delay
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D training succeed
Load ddrfw from eMMC, src: 0x00020200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!

R0_RxClkDly_Margin==70 ps 6
R0_TxDqDly_Margi==106 ps 9


R1_RxClkDly_Margin==0 ps 0
R1_TxDqDly_Margi==0 ps 0

 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0001 
2D training succeed
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 2048MB
DMC_DDR_CTRL: 00600024DDR size: 3928MB
cs0 DataBus test pass
cs1 DataBus test pass
cs0 AddrBus test pass
cs1 AddrBus test pass
 pre test  bdlr_100_average==473 bdlr_100_min==473 bdlr_100_max==473 bdlr_100_cur==473
 aft test  bdlr_100_average==473 bdlr_100_min==473 bdlr_100_max==473 bdlr_100_cur==473
non-sec scramble use zero key
ddr scramble enabled

100bdlr_step_size ps== 473
result report
boot times 3Enable ddr reg access
00000000
emmc switch 3 ok
Authentication key not yet programmed
get rpmb counter error 0x00000007
00000000
emmc switch 0 ok
Load FIP HDR from eMMC, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0
Load BL3X from eMMC, src: 0x0003c200, des: 0x0172c000, size: 0x00097200, part: 0
0.0;M3 CHK:0;cm4_sp_mode 0
E30HDR
MVN_1=0x00000000
MVN_2=0x00000000
[Image: g12b_v1.1.3375-8f9c8a7 2019-01-24 10:44:46 guotai.shen@droid11-sz]
OPS=0x40
ring efuse init
chipver efuse init
29 0a 40 00 01 1e 16 00 00 19 34 37 57 4e 4b 50 
[3.487465 Inits done]
secure task start!
high task start!
low task start!
run into bl31
NOTICE:  BL31: v1.3(release):ab8811b
NOTICE:  BL31: Built : 15:03:31, Feb 12 2019
NOTICE:  BL31: G12A normal boot!
NOTICE:  BL31: BL33 decompress pass
ERROR:   Error initializing runtime service opteed_fast


U-Boot 2015.01-g7fe9711 (Sep 03 2020 - 17:59:22), Build: jenkins-s922_pie_64-ACCESS=Gerrit,BRANCH=g12_9.0.0_64_master,DEVICE=odroidn2-80

DRAM:  3.5 GiB
Relocation Offset is: d6ef2000
spi_post_bind(spifc): req_seq = 0
register usb cfg[0][1] = 00000000d7f84e40
MMC:   aml_priv->desc_buf = 0x00000000d3ee27c0
aml_priv->desc_buf = 0x00000000d3ee4b00
SDIO Port C: 0, SDIO Port B: 1
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
emmc/sd response timeout, cmd8, status=0x1ff2800
emmc/sd response timeout, cmd55, status=0x1ff2800
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x1, tx-dly 0, clock 40000000
aml_sd_retry_refix[983]:delay = 0x0,gadjust =0x22000
[mmc_startup] mmc refix success
[mmc_init] mmc init success
In:    serial
Out:   serial
Err:   serial
vpu: error: vpu: check dts: FDT_ERR_BADMAGIC, load default parameters
vpu: driver version: v20190313
vpu: detect chip type: 9
vpu: clk_level default: 7(666667000Hz), max: 7(666667000Hz)
vpu: clk_level = 7
vpu: vpu_power_on
vpu: set_vpu_clk
vpu: set clk: 666667000Hz, readback: 666666667Hz(0x100)
vpu: set_vpu_clk finish
vpu: vpu_module_init_config
vpp: vpp_init
vpp: g12a/b osd1 matrix rgb2yuv ..............
vpp: g12a/b osd2 matrix rgb2yuv..............
vpp: g12a/b osd3 matrix rgb2yuv..............
cvbs: cpuid:0x29
cvbs_config_hdmipll_g12a
cvbs_set_vid2_clk
reading boot-logo.bmp.gz
27178 bytes read in 4 ms (6.5 MiB/s)
[OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters
[OSD]set initrd_high: 0x3d800000
[OSD]fb_addr for logo: 0x3d800000
[OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters
[OSD]fb_addr for logo: 0x3d800000
[OSD]VPP_OFIFO_SIZE:0xfff01fff
[CANVAS]canvas init
[CANVAS]addr=0x3d800000 width=3840, height=1440
cvbs: outputmode[1080p60hz] is invalid
vpp: vpp_matrix_update: 2
set hdmitx VIC = 16
config HPLL = 5940000 frac_rate = 1
HPLL: 0x3b3a04f7
HPLL: 0x1b3a04f7
HPLLv1: 0xdb3a04f7
config HPLL done
j = 6  vid_clk_div = 1
hdmitx phy setting done
hdmitx: set enc for VIC: 16
enc_vpu_bridge_reset[1319]
rx version is 1.4 or below  div=10
set hdmitx VIC = 16
config HPLL = 5940000 frac_rate = 1
HPLL: 0x3b3a04f7
HPLL: 0x1b3a04f7
HPLLv1: 0xdb3a04f7
config HPLL done
j = 6  vid_clk_div = 1
hdmitx phy setting done
hdmitx: set enc for VIC: 16
enc_vpu_bridge_reset[1319]
rx version is 1.4 or below  div=10
[OSD]osd_hw.free_dst_data: 0,1919,0,1079
Net:   dwmac.ff3f0000
Hit Enter or space or Ctrl+C key to stop autoboot -- :  0 
## Attempting fetch boot.ini in mmc:0...
reading boot.ini
3287 bytes read in 3 ms (1 MiB/s)
## Executing script at 04000000
reading env.ini
5611 bytes read in 3 ms (1.8 MiB/s)
ini: Imported hdmimode as 1080p60hz
ini: Imported modeline as 2560,1440,241500,88800,60,2560,2608,2640,2720,1440,1442,1447,1481,1,1,1
ini: Imported customwidth as 2560
ini: Imported customheight as 1440
ini: Imported voutmode as hdmi
ini: Imported display_autodetect as true
ini: Imported autoFramerate as false
ini: Imported backlight_pwm as yes
ini: Imported adjustScreenWay as alignment
ini: Imported zoom_rate as 100
ini: Imported screenAlignment as 0 0 0 0
ini: Imported colorattribute as 444,8bit
ini: Imported osd_reverse as 0
ini: Imported video_reverse as 0
ini: Imported suspend_hdmiphy as 1
ini: Imported cvbsmode as 576cvbs
ini: Imported disablehpd as false
ini: Imported disable_vu7 as false
ini: Imported touch_invert_x as false
ini: Imported touch_invert_y as false
ini: Imported test_mt_vid as 0000
ini: Imported test_mt_pid as 0000
ini: Imported prevent_sleep as 1
ini: Imported max_freq_big as 1800
ini: Imported max_freq_little as 1896
ini: Imported governor_big as performance
ini: Imported governor_little as performance
ini: Imported enable_wol as 0
ini: Imported heartbeat as 1
ini: Imported sg_tablesize as 2
ini: Imported overlays as i2c0 i2c1 spi0 uart0 pwm_cd pwm_ef
ini: Imported overlays_resize as 16384
edid extension block number : 2
Dump EDID Rawdata
000000000000000009d1d178455400002c17010380301b782e2795a55550a227
0b5054210800818081c08100a9c0b300d1c001010101023a801871382d40582c
4500dd0c1100001e000000ff0031424430323332313031390a20000000fd0032
4c1e5311000a202020202020000000fc0042656e51204757323236350a200159
020322f14f901f05140413031201110207161506230907078301000065030c00
1000023a801871382d40582c4500dd0c1100001f011d8018711c1620582c2500
dd0c1100009f011d007251d01e206e285500dd0c1100001e8c0ad08a20e02d10
103e9600dd0c110000180000000000000000000000000000000000000000007b
No header found - count 0
hdmitx: read edid fails.. retry..
edid extension block number : 2
Dump EDID Rawdata
00ffffffffffff0009d1d178455400002c17010380301b782e2795a55550a227
0b5054210800818081c08100a9c0b300d1c001010101023a801871382d40582c
4500dd0c1100001e000000ff0031424430323332313031390a20000000fd0032
4c1e5311000a202020202020000000fc0042656e51204757323236350a200159
020322f14f901f05140413031201110207161506230907078301000065030c00
1000023a801871382d40582c4500dd0c1100001f011d8018711c1620582c2500
dd0c1100009f011d007251d01e206e285500dd0c1100001e8c0ad08a20e02d10
103e9600dd0c110000180000000000000000000000000000000000000000007b
Manufacturer: BNQ Model 78d1 Serial Number 21573
EDID version: 1.3
Established timings supported:
  640x480@60Hz
  800x600@60Hz
  1024x768@60Hz
Standard timings supported:
  1280x1024@60Hz
  1280x720@60Hz
  1280x800@60Hz
  1600x900@60Hz
  1680x1050@60Hz
  1920x1080@60Hz
Detailed mode (1) : Clock 148 MHz, 477 mm x 268 mm
               1920 2008 2052 2200 hborder 0
               1080 1084 1089 1125 vborder 0
               +hsync +vsync 
Serial number: 1BD02321019
Monitor ranges (GTF): 50-76Hz V, 30-83kHz H, max dotclock 170MHz
Monitor name: BenQ GW2265
Has 1 extension blocks
Checksum: 0x59 (valid)

CEA extension block
Extension version: 3
30 bytes of CEA data
    VIC  16 1920x1080@60Hz (native)
    VIC  31 1920x1080@50Hz 
    VIC   5 1920x1080i@60Hz 
    VIC  20 1920x1080i@50Hz 
    VIC   4 1280x720@60Hz 
    VIC  19 1280x720@50Hz 
    VIC   3 720x480@60Hz 
    VIC  18 720x576@50Hz 
    VIC   1 640x480@60Hz 
    VIC  17 720x576@50Hz 
    VIC   2 720x480@60Hz 
    VIC   7 1440x480i@60Hz 
    VIC  22 1440x576i@50Hz 
    VIC  21 1440x576i@50Hz 
    VIC   6 1440x480i@60Hz 
    Linear PCM, max channels 2
  Vendor-specific data block, OUI 000c03 (HDMI)
Detailed mode (1) : Clock 148 MHz, 477 mm x 268 mm
               1920 2008 2052 2200 hborder 0
               1080 1084 1089 1125 vborder 0
               +hsync +vsync 
Detailed mode (1) : Clock 74 MHz, 477 mm x 268 mm
               1920 2008 2052 2200 hborder 0
                540  542  547  562 vborder 0
               +hsync +vsync interlaced 
Detailed mode (1) : Clock 74 MHz, 477 mm x 268 mm
               1280 1390 1430 1650 hborder 0
                720  725  730  750 vborder 0
               +hsync +vsync 
Detailed mode (1) : Clock 27 MHz, 477 mm x 268 mm
                720  736  798  858 hborder 0
                480  489  495  525 vborder 0
               -hsync -vsync 
Checksum: 0x7b (valid)

bestmode is custombuilt, IEEEOUI 0x000c03
HDMI Mode
movi: the partiton 'dtbs' is reading...
### CRAMFS load complete: 73149 bytes loaded to 0x10000000
### CRAMFS load complete: 223 bytes loaded to 0x1080000
### CRAMFS load complete: 223 bytes loaded to 0x1080000
### CRAMFS load complete: 516 bytes loaded to 0x1080000
### CRAMFS load complete: 225 bytes loaded to 0x1080000
### CRAMFS load complete: 413 bytes loaded to 0x1080000
### CRAMFS load complete: 412 bytes loaded to 0x1080000
### CRAMFS load complete: 1634 bytes loaded to 0x1080000
movi: the partiton 'boot' is reading...
Bad Linux ARM64 Image magic!
ee_gate_off ...
## Booting Android Image at 0x01080000 ...
reloc_addr =d3f0ead0
copy done
Kernel command line: otg_device=1 buildvariant=eng
No androidboot.dtbo_idx configuredactive_slot is <NULL>
Unknown command 'store' - try 'help'
No dtbo patitions found
load dtb from 0x10000000 ......
No valid dtbo image found
   Uncompressing Kernel Image ... OK
   kernel loaded at 0x01080000, end = 0x0295ca00
   reserving fdt memory region: addr=10000000 size=29000
   Loading Ramdisk to 3d677000, end 3d7ff76c ... OK
   Loading Device Tree to 000000001ffd4000, end 000000001fffffff ... OK

Starting kernel ...

uboot time: 8679040 us
pwr_key=ffffffff
[    0.000000@0]        07400000 - 07500000,     1024 KB, ramoops@0x07400000
[    0.000000@0]        05000000 - 05400000,     4096 KB, linux,secmon
[    0.000000@0]        7f800000 - 80000000,     8192 KB, linux,meson-fb
[    0.000000@0]        e5800000 - ed800000,   131072 KB, linux,ion-dev
[    0.000000@0]        e3000000 - e5800000,    40960 KB, linux,di_cma
[    0.000000@0]        e3000000 - e3000000,        0 KB, linux,ppmgr
[    0.000000@0]        cfc00000 - e3000000,   315392 KB, linux,codec_mm_cma
[    0.000000@0]        cfc00000 - cfc00000,        0 KB, linux,codec_mm_reserved
[    0.346381@4] codec_mm_module_init
[    0.354417@4] clkmsr ffd18004.meson_clk_msr: failed to get msr ring reg0
[    0.370746@4] cvbs_out: chrdev devno 263192576 for disp
[    0.551060@3] dmi: Firmware registration failed.
[    0.787018@5] meson-pwm ff802000.pwm: pwm pinmux : can't get pinctrl
[    0.787344@5] meson-pwm ffd1b000.pwm: pwm pinmux : can't get pinctrl
[    0.801669@2] mtdoops: mtd device (mtddev=name/number) must be supplied
[    0.818001@2] meson_cpufreq_init:don't find the node <dynamic_gp1_clk>
[    0.820635@2] meson_cpufreq_init:don't find the node <dynamic_gp1_clk>
[    0.823404@2] ff803000.serial: clock gate not found
[    0.935851@5] gpio-keypad ff800000.gpio_keypad: failed to get gpio index from dts
[    0.937927@5] meson-remote ff808040.rc: don't find the node <led_blink>
[    0.944331@5] meson-remote ff808040.rc: don't find the node <led_blink_frq>
[    0.952602@2] efuse efuse:  open efuse clk gate error!!
[    0.971247@5] di_get_vpu_clkb: get clk vpu error.
[    0.973684@2] Reserved memory: failed to init DMA memory pool at 0x00000000e3000000, size 0 MiB
[    0.983778@5] meson-mmc: >>>>>>>>hostbase ffffff80086f3000, dmode 
[    1.040778@5] meson-mmc: >>>>>>>>hostbase ffffff80086fc000, dmode 
[    1.083847@5] cectx ff80023c.aocec: cec driver date:2019/12/09:sm1 bus check reg define err
[    1.083847@5] 
[    1.088492@2] cectx ff80023c.aocec: compatible:amlogic, aocec-g12a
[    1.094403@2] cectx ff80023c.aocec: cecb_ver:0x1
[    1.098965@2] cectx ff80023c.aocec: line_reg:0x1
[    1.103550@2] cectx ff80023c.aocec: line_bit:0x3
[    1.108142@2] cectx ff80023c.aocec: ee_to_ao:0x1
[    1.113094@5] cectx ff80023c.aocec: not find 'port_num'
[    1.118083@5] cectx ff80023c.aocec: using cec:1
[    1.122657@5] cectx ff80023c.aocec: no hdmirx regs
[    1.127369@5] cectx ff80023c.aocec: no hhi regs
[    1.131818@2] cectx ff80023c.aocec: not find 'output'
[    1.138766@2] cectx ff80023c.aocec: wakeup_reason:0x0
[    1.141860@2] cectx ff80023c.aocec: cev val1: 0x0;val2: 0x0
[    1.147313@2] cectx ff80023c.aocec: aml_cec_probe success end
[    1.155908@2] page_trace_module_init, create sysfs failed
[    1.159236@2] defendkey ff630218.defendkey: Reserved memory is not enough!
[    1.167680@2] Error: Driver 'spdif-dit' is already registered, aborting...
[    1.381058@2] aml_codec_T9015 ff632000.t9015: ASoC: no source widget found for Left DAC
[    1.383413@2] aml_codec_T9015 ff632000.t9015: ASoC: Failed to add route Left DAC -> LOLP_SEL_DACL -> Lineout left P switch
[    1.394428@2] aml_codec_T9015 ff632000.t9015: ASoC: no source widget found for Left DAC
[    1.402396@2] aml_codec_T9015 ff632000.t9015: ASoC: Failed to add route Left DAC -> LOLP_SEL_DACL_INV -> Lineout left P switch
[    1.413749@2] aml_codec_T9015 ff632000.t9015: ASoC: no source widget found for Left DAC
[    1.421722@2] aml_codec_T9015 ff632000.t9015: ASoC: Failed to add route Left DAC -> LOLN_SEL_DACL_INV -> Lineout left N switch
[    1.433075@2] aml_codec_T9015 ff632000.t9015: ASoC: no source widget found for Left DAC
[    1.441050@2] aml_codec_T9015 ff632000.t9015: ASoC: Failed to add route Left DAC -> LOLN_SEL_DACL -> Lineout left N switch
[    1.452054@2] aml_codec_T9015 ff632000.t9015: ASoC: no source widget found for Right DAC
[    1.460116@2] aml_codec_T9015 ff632000.t9015: ASoC: Failed to add route Right DAC -> LORP_SEL_DACR -> Lineout right P switch
[    1.471295@2] aml_codec_T9015 ff632000.t9015: ASoC: no source widget found for Right DAC
[    1.479356@2] aml_codec_T9015 ff632000.t9015: ASoC: Failed to add route Right DAC -> LORP_SEL_DACR_INV -> Lineout right P switch
[    1.490897@2] aml_codec_T9015 ff632000.t9015: ASoC: no source widget found for Right DAC
[    1.498969@2] aml_codec_T9015 ff632000.t9015: ASoC: Failed to add route Right DAC -> LORN_SEL_DACR_INV -> Lineout right N switch
[    1.510502@2] aml_codec_T9015 ff632000.t9015: ASoC: no source widget found for Right DAC
[    1.518537@2] aml_codec_T9015 ff632000.t9015: ASoC: Failed to add route Right DAC -> LORN_SEL_DACR -> Lineout right N switch
[    1.531672@5] asoc-aml-card auge_sound: control 2:0:0:I2SIn CLK:0 is already present
[    1.537429@5] snd_tdm ff642000.audiobus:tdmb: ASoC: Failed to add I2SIn CLK: -16
[    1.544795@5] aml_dai_tdm_probe, failed add snd tdm controls
[    1.551500@5] aml_codec_T9015 ff632000.t9015: ASoC: mux Lineout left P switch has no paths
[    1.558673@5] aml_codec_T9015 ff632000.t9015: ASoC: mux Lineout left N switch has no paths
[    1.566907@5] aml_codec_T9015 ff632000.t9015: ASoC: mux Lineout right P switch has no paths
[    1.575218@5] aml_codec_T9015 ff632000.t9015: ASoC: mux Lineout right N switch has no paths
[    1.73=[    2.251972@0] reboot: Restarting system with command 'bootloader'
bl31 reboot reason: 0xd
bl31 reboot reason: 0x7
system cmd  1.
G12B:BL:6e7c85:7898ac;FEAT:E0F83180:2000;POC:F;RCY:0;EMMC:0;READ:0;0.0
                                                                      bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0000 - pwm id 0x01
bl2_stage_init 0xc1
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:00008067
L3:04000000
B2:00002000
B1:e0f83180

TE: 77208

BL2 Built : 06:17:13, Jun 28 2019. g12b gf0505d7-dirty - qi.duan@droid13

Board ID = 4
Set A53 clk to 24M
Set A73 clk to 24M
Set clk81 to 24M
A53 clk: 1200 MHz
A73 clk: 1200 MHz
CLK81: 166.6M
smccc: 00017576
eMMC boot @ 0
sw8 s
DDR driver_vesion: LPDDR4_PHY_V_0_1_14 build time: Jun 28 2019 06:17:09
board id: 4
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
fw parse done
Load ddrfw from eMMC, src: 0x00030200, des: 0xfffd0000, size: 0x0000c000, part: 0
Load ddrfw from eMMC, src: 0x0002c200, des: 0xfffd0000, size: 0x00004000, part: 0
PIEI prepare done
fastboot data load
00000000
emmc switch 1 ok
00000000
emmc switch 2 ok
fastboot data verify
verify result: 255
Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
DDR4 probe
ddr clk to 1320MHz
Load ddrfw from eMMC, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 0
00000000
emmc switch 0 ok
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of Write leveling coarse delay
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D training succeed
Load ddrfw from eMMC, src: 0x00020200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!

R0_RxClkDly_Margin==82 ps 7
R0_TxDqDly_Margi==106 ps 9


R1_RxClkDly_Margin==0 ps 0
R1_TxDqDly_Margi==0 ps 0

 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0001 
2D training succeed
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 2048MB
DMC_DDR_CTRL: 00600024DDR size: 3928MB
cs0 DataBus test pass
cs1 DataBus test pass
cs0 AddrBus test pass
cs1 AddrBus test pass
 pre test  bdlr_100_average==473 bdlr_100_min==473 bdlr_100_max==473 bdlr_100_cur==473
 aft test  bdlr_100_average==473 bdlr_100_min==473 bdlr_100_max==473 bdlr_100_cur==473
non-sec scramble use zero key
ddr scramble enabled

100bdlr_step_size ps== 473
result report
boot times 4Enable ddr reg access
00000000
emmc switch 3 ok
Authentication key not yet programmed
get rpmb counter error 0x00000007
00000000
emmc switch 0 ok
Load FIP HDR from eMMC, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0
Load BL3X from eMMC, src: 0x0003c200, des: 0x0172c000, size: 0x00097200, part: 0
0.0;M3 CHK:0;cm4_sp_mode 0
E30HDR
MVN_1=0x00000000
MVN_2=0x00000000
[Image: g12b_v1.1.3375-8f9c8a7 2019-01-24 10:44:46 guotai.shen@droid11-sz]
OPS=0x40
ring efuse init
chipver efuse init
29 0a 40 00 01 1e 16 00 00 19 34 37 57 4e 4b 50 
[3.448859 Inits done]
secure task start!
high task start!
low task start!
run into bl31
NOTICE:  BL31: v1.3(release):ab8811b
NOTICE:  BL31: Built : 15:03:31, Feb 12 2019
NOTICE:  BL31: G12A normal boot!
NOTICE:  BL31: BL33 decompress pass
ERROR:   Error initializing runtime service opteed_fast


U-Boot 2015.01-g7fe9711 (Sep 03 2020 - 17:59:22), Build: jenkins-s922_pie_64-ACCESS=Gerrit,BRANCH=g12_9.0.0_64_master,DEVICE=odroidn2-80

DRAM:  3.5 GiB
Relocation Offset is: d6ef2000
spi_post_bind(spifc): req_seq = 0
register usb cfg[0][1] = 00000000d7f84e40
MMC:   aml_priv->desc_buf = 0x00000000d3ee27c0
aml_priv->desc_buf = 0x00000000d3ee4b00
SDIO Port C: 0, SDIO Port B: 1
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
emmc/sd response timeout, cmd8, status=0x1ff2800
emmc/sd response timeout, cmd55, status=0x1ff2800
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x1, tx-dly 0, clock 40000000
aml_sd_retry_refix[983]:delay = 0x0,gadjust =0x22000
[mmc_startup] mmc refix success
[mmc_init] mmc init success
In:    serial
Out:   serial
Err:   serial
vpu: error: vpu: check dts: FDT_ERR_BADMAGIC, load default parameters
vpu: driver version: v20190313
vpu: detect chip type: 9
vpu: clk_level default: 7(666667000Hz), max: 7(666667000Hz)
vpu: clk_level = 7
vpu: vpu_power_on
vpu: set_vpu_clk
vpu: set clk: 666667000Hz, readback: 666666667Hz(0x100)
vpu: set_vpu_clk finish
vpu: vpu_module_init_config
vpp: vpp_init
vpp: g12a/b osd1 matrix rgb2yuv ..............
vpp: g12a/b osd2 matrix rgb2yuv..............
vpp: g12a/b osd3 matrix rgb2yuv..............
cvbs: cpuid:0x29
cvbs_config_hdmipll_g12a
cvbs_set_vid2_clk
reading boot-logo.bmp.gz
27178 bytes read in 4 ms (6.5 MiB/s)
[OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters
[OSD]set initrd_high: 0x3d800000
[OSD]fb_addr for logo: 0x3d800000
[OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters
[OSD]fb_addr for logo: 0x3d800000
[OSD]VPP_OFIFO_SIZE:0xfff01fff
[CANVAS]canvas init
[CANVAS]addr=0x3d800000 width=3840, height=1440
cvbs: outputmode[1080p60hz] is invalid
vpp: vpp_matrix_update: 2
set hdmitx VIC = 16
config HPLL = 5940000 frac_rate = 1
HPLL: 0x3b3a04f7
HPLL: 0x1b3a04f7
HPLLv1: 0xdb3a04f7
config HPLL done
j = 6  vid_clk_div = 1
hdmitx phy setting done
hdmitx: set enc for VIC: 16
enc_vpu_bridge_reset[1319]
rx version is 1.4 or below  div=10
set hdmitx VIC = 16
config HPLL = 5940000 frac_rate = 1
HPLL: 0x3b3a04f7
HPLL: 0x1b3a04f7
HPLLv1: 0xdb3a04f7
config HPLL done
j = 6  vid_clk_div = 1
hdmitx phy setting done
hdmitx: set enc for VIC: 16
enc_vpu_bridge_reset[1319]
rx version is 1.4 or below  div=10
[OSD]osd_hw.free_dst_data: 0,1919,0,1079
Net:   dwmac.ff3f0000
odroidn2#
It ends on an uboot command line.

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Re: Android PIE 32-bit development stopped?

Post by tobetter »

Thank you for the logs. I can see the log this and it literally switched to U-boot but don't know why.

Code: Select all

[ 1.73=[ 2.251972@0] reboot: Restarting system with command 'bootloader'
Do you see the Android animation that appears when Android recovery is started?
I think I should discuss with Android guy if there is an recovery script that checks Android version.

I am also wondering if your remote devices are updated with Hardkernel's new version how does your apps can be installed and run on the deivce?

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Re: Android PIE 32-bit development stopped?

Post by OverSoft »

The data partition stays intact and takes care of any post-installation work.
I normally don't issue a wipe-data after installation.

I'm very willing to roll our own update.zip, if it's possible to sign them myself.
I have a feeling that formatting the system, vendor, product and odm partitions before extracting the package contents will help a lot, since there might be some 32-bit binaries left on those partitions.

For example: in the updater-script, the system partition is updated as follows:
mount("ext4", "EMMC", "/dev/block/system", "/system");
package_extract_dir("system", "/system");

If I add
format("ext4", "EMMC", "/dev/block/system", "0", "/system");
before that, that would take care of any remaining files, but ofcourse, I would have to resign the update.zip.
Are the signing keys available?

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Re: Android PIE 32-bit development stopped?

Post by tobetter »

OverSoft wrote:
Thu Sep 10, 2020 11:15 pm
The data partition stays intact and takes care of any post-installation work.
I normally don't issue a wipe-data after installation.

I'm very willing to roll our own update.zip, if it's possible to sign them myself.
I have a feeling that formatting the system, vendor, product and odm partitions before extracting the package contents will help a lot, since there might be some 32-bit binaries left on those partitions.

For example: in the updater-script, the system partition is updated as follows:
mount("ext4", "EMMC", "/dev/block/system", "/system");
package_extract_dir("system", "/system");

If I add
format("ext4", "EMMC", "/dev/block/system", "0", "/system");
before that, that would take care of any remaining files, but ofcourse, I would have to resign the update.zip.
Are the signing keys available?
Actually Hardkernel Android system is not strict at the signing. If you download the source tree and build it by yourself, you will have the selfinstallation image as well as the update file. Also you can customize the recovery script, so you should consider to try if you think you need to manage the device more than Hardkernel provide. Maybe two options, 1) let me discuss with Android guy how your device can be updated to 64 bit from 32 bit and 2) you manage the 32 bit Android by yourself if Hardkernel can help you to build 32 bit Android. Due to the low demand of 32 bit Android support, we dropped it from build server since it doubles the testing whenever new version is out.

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Re: Android PIE 32-bit development stopped?

Post by codewalker »

I've made a firmware that upgrades from 32-bit Android to 64-bit Android.
If you didn't install the GMS(Google Play Store), you just download it and run "update" from "ODROID Settings"

https://dn.odroid.com/S922X/ODROID-N2/A ... 32/32to64/

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Re: Android PIE 32-bit development stopped?

Post by OverSoft »

Great, I'll try it out ASAP!
Thank you so much!

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Re: Android PIE 32-bit development stopped?

Post by OverSoft »

Update: this works, thank you very much!

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Re: Android PIE 32-bit development stopped?

Post by OverSoft »

Update2: It seems this update breaks the recovery functionality.

After updating, a "reboot recovery" does not boot recovery, it keeps rebooting until it gets back to normal Android.

Log:

Code: Select all

console:/odm $ reboot recovery
[  268.947984@0] libprocessgroup: Failed to kill process cgroup uid 0 pid 2943 in 223ms, 1 processes remain
wake-on-lan = 00000001
[  269.650209@0] reboot: Restarting system with command 'recovery'
bl31 reboot reason: 0xd
bl31 reboot reason: 0x2
system cmd  1.
G12B:BL:6e7c85:7898ac;FEAT:E0F83180:2000;POC:F;RCY:0;EMMC:0;READ:0;0.0
                                                                      bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0000 - pwm id 0x01
bl2_stage_init 0xc1
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:00008067
L3:04000000
B2:00002000
B1:e0f83180

TE: 91751

BL2 Built : 06:17:13, Jun 28 2019. g12b gf0505d7-dirty - qi.duan@droid13

Board ID = 4
Set A53 clk to 24M
Set A73 clk to 24M
Set clk81 to 24M
A53 clk: 1200 MHz
A73 clk: 1200 MHz
CLK81: 166.6M
smccc: 0001ae47
eMMC boot @ 0
sw8 s
DDR driver_vesion: LPDDR4_PHY_V_0_1_14 build time: Jun 28 2019 06:17:09
board id: 4
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
fw parse done
Load ddrfw from eMMC, src: 0x00030200, des: 0xfffd0000, size: 0x0000c000, part: 0
Load ddrfw from eMMC, src: 0x0002c200, des: 0xfffd0000, size: 0x00004000, part: 0
PIEI prepare done
fastboot data load
00000000
emmc switch 1 ok
00000000
emmc switch 2 ok
fastboot data verify
verify result: 255
Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
DDR4 probe
ddr clk to 1320MHz
Load ddrfw from eMMC, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 0
00000000
emmc switch 0 ok
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of Write leveling coarse delay
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D training succeed
Load ddrfw from eMMC, src: 0x00020200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!

R0_RxClkDly_Margin==94 ps 8
R0_TxDqDly_Margi==106 ps 9


R1_RxClkDly_Margin==0 ps 0
R1_TxDqDly_Margi==0 ps 0

 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0001 
2D training succeed
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 2048MB
DMC_DDR_CTRL: 00600024DDR size: 3928MB
cs0 DataBus test pass
cs1 DataBus test pass
cs0 AddrBus test pass
cs1 AddrBus test pass
 pre test  bdlr_100_average==440 bdlr_100_min==440 bdlr_100_max==440 bdlr_100_cur==440
 aft test  bdlr_100_average==440 bdlr_100_min==440 bdlr_100_max==440 bdlr_100_cur==440
non-sec scramble use zero key
ddr scramble enabled

100bdlr_step_size ps== 440
result report
boot times 10Enable ddr reg access
00000000
emmc switch 3 ok
Authentication key not yet programmed
get rpmb counter error 0x00000007
00000000
emmc switch 0 ok
Load FIP HDR from eMMC, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0
Load BL3X from eMMC, src: 0x0003c200, des: 0x0172c000, size: 0x00097200, part: 0
0.0;M3 CHK:0;cm4_sp_mode 0
E30HDR
MVN_1=0x00000000
MVN_2=0x00000000
[Image: g12b_v1.1.3375-8f9c8a7 2019-01-24 10:44:46 guotai.shen@droid11-sz]
OPS=0x40
ring efuse init
chipver efuse init
29 0a 40 00 01 27 0a 00 00 05 30 32 54 52 4d 50 
[3.313165 Inits done]
secure task start!
high task start!
low task start!
run into bl31
NOTICE:  BL31: v1.3(release):ab8811b
NOTICE:  BL31: Built : 15:03:31, Feb 12 2019
NOTICE:  BL31: G12A normal boot!
NOTICE:  BL31: BL33 decompress pass
ERROR:   Error initializing runtime service opteed_fast


U-Boot 2015.01-g7fe9711 (Sep 03 2020 - 17:59:22), Build: jenkins-s922_pie_64-ACCESS=Gerrit,BRANCH=g12_9.0.0_64_master,DEVICE=odroidn2-80

DRAM:  3.5 GiB
Relocation Offset is: d6ef2000
spi_post_bind(spifc): req_seq = 0
register usb cfg[0][1] = 00000000d7f84e40
MMC:   aml_priv->desc_buf = 0x00000000d3ee27c0
aml_priv->desc_buf = 0x00000000d3ee4b00
SDIO Port C: 0, SDIO Port B: 1
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
emmc/sd response timeout, cmd8, status=0x1ff2800
emmc/sd response timeout, cmd55, status=0x1ff2800
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x1, tx-dly 0, clock 40000000
aml_sd_retry_refix[983]:delay = 0x0,gadjust =0x12000
[mmc_startup] mmc refix success
[mmc_init] mmc init success
In:    serial
Out:   serial
Err:   serial
vpu: error: vpu: check dts: FDT_ERR_BADMAGIC, load default parameters
vpu: driver version: v20190313
vpu: detect chip type: 9
vpu: clk_level default: 7(666667000Hz), max: 7(666667000Hz)
vpu: clk_level = 7
vpu: vpu_power_on
vpu: set_vpu_clk
vpu: set clk: 666667000Hz, readback: 666666667Hz(0x100)
vpu: set_vpu_clk finish
vpu: vpu_module_init_config
vpp: vpp_init
vpp: g12a/b osd1 matrix rgb2yuv ..............
vpp: g12a/b osd2 matrix rgb2yuv..............
vpp: g12a/b osd3 matrix rgb2yuv..............
cvbs: cpuid:0x29
cvbs_config_hdmipll_g12a
cvbs_set_vid2_clk
reading boot-logo.bmp.gz
5240 bytes read in 3 ms (1.7 MiB/s)
[OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters
[OSD]set initrd_high: 0x3d800000
[OSD]fb_addr for logo: 0x3d800000
[OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters
[OSD]fb_addr for logo: 0x3d800000
[OSD]VPP_OFIFO_SIZE:0xfff01fff
[CANVAS]canvas init
[CANVAS]addr=0x3d800000 width=3840, height=1440
cvbs: outputmode[1080p60hz] is invalid
vpp: vpp_matrix_update: 2
set hdmitx VIC = 16
config HPLL = 5940000 frac_rate = 1
HPLL: 0x3b3a04f7
HPLL: 0x1b3a04f7
HPLLv1: 0xdb3a04f7
config HPLL done
j = 6  vid_clk_div = 1
hdmitx phy setting done
hdmitx: set enc for VIC: 16
enc_vpu_bridge_reset[1319]
rx version is 1.4 or below  div=10
set hdmitx VIC = 16
config HPLL = 5940000 frac_rate = 1
HPLL: 0x3b3a04f7
HPLL: 0x1b3a04f7
HPLLv1: 0xdb3a04f7
config HPLL done
j = 6  vid_clk_div = 1
hdmitx phy setting done
hdmitx: set enc for VIC: 16
enc_vpu_bridge_reset[1319]
rx version is 1.4 or below  div=10
[OSD]osd_hw.free_dst_data: 0,1919,0,1079
Net:   dwmac.ff3f0000
edid extension block number : 2
Dump EDID Rawdata
00000000000000ff1e6df159f6070700081a010380431c78eaca95a6554ea126
0f5054a54b80714f818081c0a9c0b3000101010101017e4800e0a0381f404040
3a00a11c21000018023a801871382d40582c4500a11c2100001e000000fc004c
4720554c545241574944450a000000fd00384b1e5a18000a202020202020018f
02031cf1499004031412051f0113230907078301000065030c001000023a8018
71382d40582c450056512100001e011d8018711c1620582c250056512100009e
011d007251d01e206e28550056512100001e8c0ad08a20e02d10103e96005651
21000018000000ff003630384e545355444a3739300a0000000000000000007d
No header found - count 0
hdmitx: read edid fails.. retry..
edid extension block number : 2
Dump EDID Rawdata
00ffffffffffff001e6df159f6070700081a010380431c78eaca95a6554ea126
0f5054a54b80714f818081c0a9c0b3000101010101017e4800e0a0381f404040
3a00a11c21000018023a801871382d40582c4500a11c2100001e000000fc004c
4720554c545241574944450a000000fd00384b1e5a18000a202020202020018f
02031cf1499004031412051f0113230907078301000065030c001000023a8018
71382d40582c450056512100001e011d8018711c1620582c250056512100009e
011d007251d01e206e28550056512100001e8c0ad08a20e02d10103e96005651
21000018000000ff003630384e545355444a3739300a0000000000000000007d
Manufacturer: GSM Model 59f1 Serial Number 460790
EDID version: 1.3
Established timings supported:
  720x400@70Hz
  640x480@60Hz
  640x480@75Hz
  800x600@60Hz
  800x600@75Hz
  1024x768@60Hz
  1024x768@75Hz
  1280x1024@75Hz
  1152x870@75Hz
Standard timings supported:
  1152x864@75Hz
  1280x1024@60Hz
  1280x720@60Hz
  1600x900@60Hz
  1680x1050@60Hz
Detailed mode (1) : Clock 185 MHz, 673 mm x 284 mm
               2560 2624 2688 2784 hborder 0
               1080 1083 1093 1111 vborder 0
               -hsync -vsync 
Detailed mode (1) : Clock 148 MHz, 673 mm x 284 mm
               1920 2008 2052 2200 hborder 0
               1080 1084 1089 1125 vborder 0
               +hsync +vsync 
Monitor name: LG ULTRAWIDE
Monitor ranges (GTF): 56-75Hz V, 30-90kHz H, max dotclock 240MHz
Has 1 extension blocks
Checksum: 0x8f (valid)

CEA extension block
Extension version: 3
24 bytes of CEA data
    VIC  16 1920x1080@60Hz (native)
    VIC   4 1280x720@60Hz 
    VIC   3 720x480@60Hz 
    VIC  20 1920x1080i@50Hz 
    VIC  18 720x576@50Hz 
    VIC   5 1920x1080i@60Hz 
    VIC  31 1920x1080@50Hz 
    VIC   1 640x480@60Hz 
    VIC  19 1280x720@50Hz 
    Linear PCM, max channels 2
  Vendor-specific data block, OUI 000c03 (HDMI)
Detailed mode (1) : Clock 148 MHz, 598 mm x 337 mm
               1920 2008 2052 2200 hborder 0
               1080 1084 1089 1125 vborder 0
               +hsync +vsync 
Detailed mode (1) : Clock 74 MHz, 598 mm x 337 mm
               1920 2008 2052 2200 hborder 0
                540  542  547  562 vborder 0
               +hsync +vsync interlaced 
Detailed mode (1) : Clock 74 MHz, 598 mm x 337 mm
               1280 1390 1430 1650 hborder 0
                720  725  730  750 vborder 0
               +hsync +vsync 
Detailed mode (1) : Clock 27 MHz, 598 mm x 337 mm
                720  736  798  858 hborder 0
                480  489  495  525 vborder 0
               -hsync -vsync 
Checksum: 0x7d (valid)

bestmode is custombuilt, IEEEOUI 0x000c03
HDMI Mode
co-phase 0x1, tx-dly 0, clock 40000000
co-phase 0x1, tx-dly 0, clock 40000000
co-phase 0x3, tx-dly 0, clock 400000
emmc/sd response timeout, cmd8, status=0x1ff2800
emmc/sd response timeout, cmd55, status=0x1ff2800
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x1, tx-dly 0, clock 40000000
aml_sd_retry_refix[983]:delay = 0x0,gadjust =0x12000
[mmc_startup] mmc refix success
[mmc_init] mmc init success
switch to partitions #0, OK
mmc0(part 0) is current device
movi: the partiton 'recovery' is reading...
movi: the partiton 'dtbs' is reading...
[rsvmem] get fdtaddr NULL!
rsvmem - reserve memory

Usage:
rsvmem check                   - check reserved memory
rsvmem dump                    - dump reserved memory

rsvmem check failed
Bad Linux ARM64 Image magic!
ee_gate_off ...
## Booting Android Image at 0x01080000 ...
reloc_addr =d3f0ec50
copy done
Kernel command line: otg_device=1 buildvariant=eng
No androidboot.dtbo_idx configuredactive_slot is <NULL>
Unknown command 'store' - try 'help'
No dtbo patitions found
load dtb from 0x1000000 ......
ERROR: image is not a fdt - must RESET the board to recover.
load dtb from 0xd4f6cc50 ......
## No Flattened Device Tree
Could not find a valid device tree
[rsvmem] get fdtaddr NULL!
rsvmem - reserve memory

Usage:
rsvmem check                   - check reserved memory
rsvmem dump                    - dump reserved memory

rsvmem check failed
ee_gate_on ...
card out
movi: the partiton 'recovery' is reading...
movi: the partiton 'dtbs' is reading...
[rsvmem] get fdtaddr NULL!
rsvmem - reserve memory

Usage:
rsvmem check                   - check reserved memory
rsvmem dump                    - dump reserved memory

rsvmem check failed
Bad Linux ARM64 Image magic!
ee_gate_off ...
## Booting Android Image at 0x01080000 ...
reloc_addr =d4f6cc60
copy done
Kernel command line: otg_device=1 buildvariant=eng
No androidboot.dtbo_idx configuredactive_slot is <NULL>
Unknown command 'store' - try 'help'
No dtbo patitions found
load dtb from 0x1000000 ......
ERROR: image is not a fdt - must RESET the board to recover.
load dtb from 0xd5fcac60 ......
## No Flattened Device Tree
Could not find a valid device tree
[rsvmem] get fdtaddr NULL!
rsvmem - reserve memory

Usage:
rsvmem check                   - check reserved memory
rsvmem dump                    - dump reserved memory

rsvmem check failed
ee_gate_on ...
Hit Enter or space or Ctrl+C key to stop autoboot -- :  0 
## Attempting fetch boot.ini in mmc:0...
reading boot.ini
3287 bytes read in 3 ms (1 MiB/s)
## Executing script at 04000000
reading env.ini
5628 bytes read in 3 ms (1.8 MiB/s)

(and then continues booting to normal Android mode)


It seems it's missing the partition addresses, since dtb is loaded from 0x100000 <- 6 zeroes, which fails, but then boots to Android while loading the dtb from 0x10000000 <- 7 zeroes
How can I fix this error? It's great that I can upgrade to 64-bit, but it would be even better if I could keep updating in the future. ;)

OverSoft
Posts: 42
Joined: Wed Feb 01, 2017 5:34 pm
languages_spoken: english
ODROIDs: C2, XU4, N2, N2+
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Re: Android PIE 32-bit development stopped?

Post by OverSoft »

Update (for people struggling with the same problem):

I've added:

Code: Select all

/system/bin/fw_setenv loadaddr 0x1080000
/system/bin/fw_setenv cramfsaddr 0x20000000
/system/bin/fw_setenv boot_recovery "hdmitx edid; if test \${hdmimode} = custombuilt; then setenv cmode modeline=\${modeline} customwidth=\${customwidth} customheight=\${customheight}; fi; if test \${hdmimode} == 2160p*; then setenv hdmimode 1080p60hz; fi; setenv bootargs \${initargs} logo=\${display_layer},loaded,\${fb_addr} vout=\${hdmimode},enable hdmimode=\${hdmimode} \${cmode} voutmode=\${voutmode} cvbsmode=\${cvbsmode} osd_reverse=\${osd_reverse} video_reverse=\${video_reverse} androidboot.selinux=permissive jtag=disable androidboot.hardware=odroidn2 recovery_part=recovery recovery_offset=0; movi read dtbs 0 \${cramfsaddr}; cramfsload \${dtb_mem_addr} meson64_odroidn2_android.dtb;if test \${variant} != c4; then cramfsload \${loadaddr} odroid\${variant}-opp.dtbo;fdt addr \${dtb_mem_addr};fdt resize 8192;fdt apply \${loadaddr};fi;movi read recovery 0 \${loadaddr}; booti \${loadaddr} - \${dtb_mem_addr}; bootm \${loadaddr};"
/system/bin/fw_setenv boot_rawimage "setenv bootargs \${initargs} logo=\${display_layer},loaded,\${fb_addr} vout=\${outputmode},enable cvbsmode=\${cvbsmode} hdmimode=\${hdmimode} osd_reverse=\${osd_reverse} video_reverse=\${video_reverse} androidboot.selinux=permissive androidboot.firstboot=\${firstboot} jtag=disable androidboot.hardware=odroidn2; movi read dtbs 0 \${cramfsaddr}; cramfsload \${dtb_mem_addr} meson64_odroidn2_android.dtb;if test \${variant} != c4; then cramfsload \${loadaddr} odroid\${variant}-opp.dtbo;fdt addr \${dtb_mem_addr};fdt resize 8192;fdt apply \${loadaddr};fi;movi read boot 0 \${loadaddr}; booti \${loadaddr} - \${dtb_mem_addr}; bootm \${loadaddr};"
to my post-update script to fix this.
These users thanked the author OverSoft for the post:
odroid (Wed Sep 16, 2020 9:26 am)

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