http://forum.odroid.com/viewtopic.php?f ... 763#p83071
Background:I finally got some time to proceed with this project.
I'm porting the Raspi Guzunty https://github.com/Guzunty/Pi/wiki
To a cheap Altera CPLD board.
Currently i'm testing on a RasPI , to verify the VHDL & fitter layout.
And it's looking good.
Next step is to do two PCB mods on the Altera board , to isolate IO-Bank2 from the 3v3 power , and connect it to the Odroid U3 1v8 power.
Any hints on how to enable/activate the Hardware SPI on my U3 (w. the spi header) is very welcome.
I have already been bitten by the Raspi's new devicetree layout, and new activacion of the SPI kernelmodule
I will publish the design here when it's done.
A 7$ SPI controlled IO expander, with ability to connect a 3v3 USB->Serial adapter to the U3 serialports.
That serialfeature alone should save you at least 10$.
I needed an U3 to "normal" levelconverter , to be able to use the serial I/O on the U3 , via my cheap usb->ttl converters.
And had just finished a simple VHDL course this summer.
Had a look around , and saw Guzunty for Raspi,
I needed a CPLD board with minimum 2 IO-Banks , one for 3v3 and one for 1v8.
Had to be cheap : *bay 271159389579 - Is that cheap enough DON't buy the RED EPM240 Board
Need a programmer : *bay 200943750380
https://github.com/Guzunty/Pi/wiki/Freq ... -questions
So far i have tested the Altera CPLDboard on a RasPI , with the gz_16o8i core.
And it's working as expected.
If i get the time i might try to do the PCB'mod tomorrow.
But i might have to wait a week , if i haven't gotten some 3v3 LDO's here in the summerhouse.
I haven't had any experience with with SPI on linux before the little i tred on the RasPI , and any help/hints on SPI on the U3 would be appreciated.
I do know the U3+ SPI announcement post : http://forum.odroid.com/viewtopic.php?f=80&t=5702
If one of the "kernel" gurus would have a look at the git repos: https://github.com/Guzunty/Pi
There is RasPI SPI sourcecode in there for the "access" : https://github.com/Guzunty/Pi/tree/master/src/gzlib
And maybe try it out on an U3 (i run Debian , from here)
There is s simple C source for each core in the core dirs , but it's the OS level stuff i'm worried about, and if.
Another showstopper would be if the U3 SPI pins are 2mm , i have only ordered some 2mm Dupont cables today , but thats prob 3-weeks via *bay.
Ohh if i "smoke" my U3 on the CPLD 1v8 conversion. Is there a chance that Hardkernel would sponsor a new one for further testing
My Odroid Pusher in EU is Pollin (Hint..Hint) , a C1 would also be welcome.
More will come when i have made the PCB mods.
Attached are a doc (made with openoffice on linux) , i'm 99% linux based , even Altera Quartus II.
And the "Blue-Schematic" , and "All of the hw doc" in one zipfile.
I repeat : DON't buy the RED EPM240 Board
1: You can't mod the print as the Viob's are under the chip.
2: The decoupling is lousy on that board , something you don't want ti have when switching 20+ pins simoultaniously.
3: Read the doc/pdf file in the attached .zip