Guzunty Pi for Odroid(s) - U3 now

Post Reply
Bingo
Posts: 73
Joined: Thu Dec 04, 2014 5:46 pm
languages_spoken: english
ODROIDs: odroid-u3 & odroid-c1/c2
Location: Denmark
Has thanked: 0
Been thanked: 0
Contact:

Guzunty Pi for Odroid(s) - U3 now

Post by Bingo » Tue Mar 31, 2015 1:34 am

Opening a new Thread with a more saying name , and continuing from the thread below
http://forum.odroid.com/viewtopic.php?f ... 763#p83071
I finally got some time to proceed with this project.

I'm porting the Raspi Guzunty https://github.com/Guzunty/Pi/wiki
To a cheap Altera CPLD board.

Currently i'm testing on a RasPI , to verify the VHDL & fitter layout.
And it's looking good.

Next step is to do two PCB mods on the Altera board , to isolate IO-Bank2 from the 3v3 power , and connect it to the Odroid U3 1v8 power.

Any hints on how to enable/activate the Hardware SPI on my U3 (w. the spi header) is very welcome.
I have already been bitten by the Raspi's new devicetree layout, and new activacion of the SPI kernelmodule :-(

I will publish the design here when it's done.

A 7$ SPI controlled IO expander, with ability to connect a 3v3 USB->Serial adapter to the U3 serialports.
That serialfeature alone should save you at least 10$.

/Bingo
Background:
I needed an U3 to "normal" levelconverter , to be able to use the serial I/O on the U3 , via my cheap usb->ttl converters.
And had just finished a simple VHDL course this summer.

Had a look around , and saw Guzunty for Raspi,
I needed a CPLD board with minimum 2 IO-Banks , one for 3v3 and one for 1v8.
Had to be cheap : *bay 271159389579 - Is that cheap enough :D DON't buy the RED EPM240 Board
Need a programmer : *bay 200943750380

https://github.com/Guzunty/Pi/wiki
https://github.com/Guzunty/Pi/wiki/Available-cores
https://github.com/Guzunty/Pi/wiki/Freq ... -questions


So far i have tested the Altera CPLDboard on a RasPI , with the gz_16o8i core.
And it's working as expected.

If i get the time i might try to do the PCB'mod tomorrow.
But i might have to wait a week , if i haven't gotten some 3v3 LDO's here in the summerhouse.

I haven't had any experience with with SPI on linux before the little i tred on the RasPI , and any help/hints on SPI on the U3 would be appreciated.
I do know the U3+ SPI announcement post : http://forum.odroid.com/viewtopic.php?f=80&t=5702
If one of the "kernel" gurus would have a look at the git repos: https://github.com/Guzunty/Pi
There is RasPI SPI sourcecode in there for the "access" : https://github.com/Guzunty/Pi/tree/master/src/gzlib
And maybe try it out on an U3 (i run Debian , from here)

There is s simple C source for each core in the core dirs , but it's the OS level stuff i'm worried about, and if.

Another showstopper would be if the U3 SPI pins are 2mm , i have only ordered some 2mm Dupont cables today , but thats prob 3-weeks via *bay.


Ohh if i "smoke" my U3 on the CPLD 1v8 conversion. Is there a chance that Hardkernel would sponsor a new one for further testing ;)
My Odroid Pusher in EU is Pollin (Hint..Hint) , a C1 would also be welcome.

More will come when i have made the PCB mods.

Attached are a doc (made with openoffice on linux) , i'm 99% linux based , even Altera Quartus II.
And the "Blue-Schematic" , and "All of the hw doc" in one zipfile.

Happy hacking

/Bingo

Ps:
I repeat : DON't buy the RED EPM240 Board
1: You can't mod the print as the Viob's are under the chip.
2: The decoupling is lousy on that board , something you don't want ti have when switching 20+ pins simoultaniously.
3: Read the doc/pdf file in the attached .zip
Attachments
blue-epm-240-schematic.zip
Schematic + How2 modify the board , parts list etc.
See the word or pdf file
(773.43 KiB) Downloaded 135 times
PCB-Mods.pdf
(116.51 KiB) Downloaded 191 times
Schematic-BLUE-EPM240-Board.pdf
(512.66 KiB) Downloaded 222 times
Last edited by Bingo on Sun Apr 05, 2015 4:33 am, edited 1 time in total.

User avatar
odroid
Site Admin
Posts: 34109
Joined: Fri Feb 22, 2013 11:14 pm
languages_spoken: English, Korean, Japanese
ODROIDs: ODROID
Has thanked: 666 times
Been thanked: 611 times
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by odroid » Tue Mar 31, 2015 10:43 am

Very interesting project!
If you can make 2~3 pages of article for our Magazine, we can sponsor a couple C1 boards. :)

Refer this link to access the SPI on U3.
http://odroid.com/dokuwiki/doku.php?id=en:u3_ioport_spi

Bingo
Posts: 73
Joined: Thu Dec 04, 2014 5:46 pm
languages_spoken: english
ODROIDs: odroid-u3 & odroid-c1/c2
Location: Denmark
Has thanked: 0
Been thanked: 0
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by Bingo » Tue Mar 31, 2015 8:58 pm

Arrghh :-(

Major setback .....
The Blue CPLD print must be multilayer !!!!!

I can't separate the VCCio for the 2 banks , even when cutting the PCB at the indicated places.
I didn't expect a cheap chinese CPLD print to be multilayer, the board is this *bay number : 161340655250
Any hints are welcome, if i have missed anything on the pcb.

Rats ... There goes the cheap CPLD board ...
I wish the Chinese would have made the VCCio for the 2 banks with separate nets, and 2 jumpers.

Well i have a backup plan.

/Bingo

Bingo
Posts: 73
Joined: Thu Dec 04, 2014 5:46 pm
languages_spoken: english
ODROIDs: odroid-u3 & odroid-c1/c2
Location: Denmark
Has thanked: 0
Been thanked: 0
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by Bingo » Wed Apr 01, 2015 12:32 am

False Alarm :D :D :D

The "shorts/connections" i was measuring was not on the PCB , it was the 3 VCCio's that were extremely low ohmed inside the cpld.
The PCB mod seems to work.
I learned something today :oops:

Right now i have separated VCCio for Bank2 , but have connected it to 3.3v

Next step is to grab 1.8v from the odroid ..... :o

/Bingo

Bingo
Posts: 73
Joined: Thu Dec 04, 2014 5:46 pm
languages_spoken: english
ODROIDs: odroid-u3 & odroid-c1/c2
Location: Denmark
Has thanked: 0
Been thanked: 0
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by Bingo » Wed Apr 01, 2015 4:03 am

Success

I now have the Guzuntu Pi - gz_16o8i core working on the Odroid U3 :D

Remember to either modprobe spi-s3c64xx on each boot

Or put the module name in /etc/modules , for automatic load on each boot.

Code: Select all

$ cat /etc/modules 
# /etc/modules: kernel modules to load at boot time.
#
# This file contains the names of kernel modules that should be loaded
# at boot time, one per line. Lines beginning with "#" are ignored.
# Parameters can be specified after the module name.
#
# Spi for the Guzunty PI cpld
spi-s3c64xx
#
A lsmod should show the two spi modules loaded : spidev & spi_s3c64xx

Code: Select all

$ lsmod
Module                  Size  Used by
bnep                   10804  2 
rfcomm                 31665  0 
bluetooth             197729  10 bnep,rfcomm
ipv6                  293783  28 
vfat                    9060  1 
fat                    48463  1 vfat
spidev                  5641  0 
spi_s3c64xx             9849  0
smsc95xx               19047  0 
usbnet                 20016  1 smsc95xx
gpio_keys               7074  0 
Here's the setup
setup.jpg
setup.jpg (168.92 KiB) Viewed 13270 times
I didn't have any 2mm headers , so i soldered wires directly on the Odroid U3 plugs.
odroid.jpg
odroid.jpg (135.74 KiB) Viewed 13270 times
Here's the cpld board used
cpld2.jpg
cpld2.jpg (151.91 KiB) Viewed 13270 times
/Bingo
Last edited by Bingo on Mon Apr 06, 2015 3:30 am, edited 2 times in total.

Bingo
Posts: 73
Joined: Thu Dec 04, 2014 5:46 pm
languages_spoken: english
ODROIDs: odroid-u3 & odroid-c1/c2
Location: Denmark
Has thanked: 0
Been thanked: 0
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by Bingo » Wed Apr 01, 2015 4:14 am

I'm having some problems reducing the SPI Speed , as my Saleae Logic can't cope with streaming 24Mb/s
And the SPI clock seems to be between 8..12MHz

Maybe some kernel guru could have a look at the attached zip.
Or clone the git-repos : https://github.com/Guzunty/Pi/

The used file (linux spi access) is in gzlib/src/gz_spi.c, the other files aren't used yet.

The core program is also attached , but it doesn't contain any lowlevel stuff.
All the linux magic happens in gzlib

NOTE: The core is working fine , between the U3 & CPLD.
The wish for slower SPI Speed setting is just for making my Saleae not dropping SPI packets.

I'll be back with more.

The CPLD hardware mod guide, is in the zipfile in the first post.

/Bingo
Attachments
gz_16o8i.zip
(59.67 KiB) Downloaded 125 times
gzlib.zip
(10.41 KiB) Downloaded 127 times

cap00k
Posts: 95
Joined: Tue May 21, 2013 10:46 am
languages_spoken: english
ODROIDs: ODROID
Has thanked: 0
Been thanked: 10 times
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by cap00k » Wed Apr 01, 2015 11:16 am


Bingo
Posts: 73
Joined: Thu Dec 04, 2014 5:46 pm
languages_spoken: english
ODROIDs: odroid-u3 & odroid-c1/c2
Location: Denmark
Has thanked: 0
Been thanked: 0
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by Bingo » Thu Apr 02, 2015 5:26 am

@cap , thnx but.

As i see it , it defines a 40MHz value , with a "10Mhz comment".
I can't see how to change it in the attched library call , and i don't want to build a new kernel , just for the Saleae use

/Bingo

User avatar
odroid
Site Admin
Posts: 34109
Joined: Fri Feb 22, 2013 11:14 pm
languages_spoken: English, Korean, Japanese
ODROIDs: ODROID
Has thanked: 666 times
Been thanked: 611 times
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by odroid » Thu Apr 02, 2015 11:33 am

There is an ioclt API to adjust the SPI clock speed.
We will let you know how to do it without building the kernel.

Bingo
Posts: 73
Joined: Thu Dec 04, 2014 5:46 pm
languages_spoken: english
ODROIDs: odroid-u3 & odroid-c1/c2
Location: Denmark
Has thanked: 0
Been thanked: 0
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by Bingo » Thu Apr 02, 2015 7:53 pm

Thanx Odroid :-)

It will make debugging easier , if i can use my Saleae Logic.

/Bingo

User avatar
odroid
Site Admin
Posts: 34109
Joined: Fri Feb 22, 2013 11:14 pm
languages_spoken: English, Korean, Japanese
ODROIDs: ODROID
Has thanked: 666 times
Been thanked: 611 times
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by odroid » Thu Apr 02, 2015 8:25 pm

Edit your source code to adjust the SPI clock frequency on the fly.

path : Pi/src/gzlib/src/gz_spi.c
line number : 34
#define SPI_MAX_SPEED 10000000

When it opens the SPI node at line # 153, the clock speed(10Mhz) is set at line # 182.


Try it and share the result.
Good luck!

Bingo
Posts: 73
Joined: Thu Dec 04, 2014 5:46 pm
languages_spoken: english
ODROIDs: odroid-u3 & odroid-c1/c2
Location: Denmark
Has thanked: 0
Been thanked: 0
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by Bingo » Fri Apr 03, 2015 3:21 pm

Hi Odroid

That one have been tried , i have been requesting 1MHz , installing the lib , and rebuilt the gz_16o8i.c
I had tested , but the Saleae was stilll reporting 125ns spi-clock.
I think it was an error to verify with the Saleae

I tried again , but verified with a scope.

Code: Select all

#define SPI_MODE              SPI_MODE_0
#define SPI_BITS_PER_WORD     8
//#define SPI_MAX_SPEED         10000000       // 10 Mhz
#define SPI_MAX_SPEED         1000000       // 1 Mhz
It's working , i have tried to set SPI_MAX_SPEED to 2 & 1 MHz , and verified with a scope.

I'll see what my Saleae says now , thanx :)

/Bingo

User avatar
odroid
Site Admin
Posts: 34109
Joined: Fri Feb 22, 2013 11:14 pm
languages_spoken: English, Korean, Japanese
ODROIDs: ODROID
Has thanked: 666 times
Been thanked: 611 times
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by odroid » Fri Apr 03, 2015 6:51 pm

Good to hear you could change the SPI clock speed.

BTW, how did you manage 1.8V/3.3V IO interface?
Please keep updating the progress. I'm really interested in your FPGA project!

Bingo
Posts: 73
Joined: Thu Dec 04, 2014 5:46 pm
languages_spoken: english
ODROIDs: odroid-u3 & odroid-c1/c2
Location: Denmark
Has thanked: 0
Been thanked: 0
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by Bingo » Sat Apr 04, 2015 8:33 pm

Most CPLDs of today have multi IO banks , and can take different VCCio's on the IO banks.
Ie. the EPM240 used here , have 2 banks , that can be supplied with different voltage levels, and therefore act as a levelconverter.

Not many CPLD's in production today , are 5v tolerant , but the one used in the original Guzuntu are.
But it's not 1.8v compatible. So we can't use it.

The EPM240 , are NOT 5v tolerant , but can do 3.3v to 1.8v (or 1.2v) levelconversion.
And the board is supercheap, so is the programmer needed.


The mod for the EPM CPLD board to take 1.8v on bank2 is described here
http://forum.odroid.com/download/file.php?id=2057

Cut 2 tracks on the pcb to isolate the VCCio on bank2 , solder a wire between pin 59 (+ on C5) to + on either + on C8 or + on C7 , it's the same track.

The CPLD has 2 IO-Banks , that can have different IO voltages.

You have to use Bank2 for 1.8v , as Bank1 had to have 3.3v , due to the onboard oscillator (3.3v) being connected there.

On the attached pic's below you can see that i have cut the 2 tracks as described in the doc.
I'll do some better pics later on , but only have my iPhone here.

Have soldered a wire from C5(+) to C7(+) , and then feed 1.8v via the white wire to C8(+) , C7 & C8+ are connected via the same track.

Now Bank2 VCCio is fed via the white wire.


Ohh: The terrible fluxresidue in the IO pins are not me , but the "Factory"


/Bingo
Attachments
pcbmod2.JPG
pcbmod2.JPG (421.84 KiB) Viewed 13179 times
pcbmod1.JPG
pcbmod1.JPG (407.31 KiB) Viewed 13179 times
Last edited by Bingo on Sat Sep 19, 2015 5:24 am, edited 5 times in total.

Bingo
Posts: 73
Joined: Thu Dec 04, 2014 5:46 pm
languages_spoken: english
ODROIDs: odroid-u3 & odroid-c1/c2
Location: Denmark
Has thanked: 0
Been thanked: 0
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by Bingo » Sat Apr 04, 2015 9:12 pm

The Altera QuartusII files are here

Quartus Project
gz_16o8i-3v3-1v8-quartus.zip
(4.15 KiB) Downloaded 122 times
Pinout & Programming files
output_files.zip
(4.92 KiB) Downloaded 120 times
Pin-out file
gz_16o8i.pin.txt
(14.68 KiB) Downloaded 214 times
Remember the Core logic is done by the Guzuntu author , i have only adjusted at little to make it fit a cheap Altera CPLD board.

The most of the pin-outs are customizable, and i have just chosen some sensible pins on the corresponding iobank.
Bank1 = 3.3v = CPLD outputs/inputs , Bank2 = 1.8v = Odroid I/O
The fixed pins are the clocks - here (sclk) , that has to go to a CPLD-Global clockpin on the 1.8v bank (Bank2) (Pin 62)

I also made a "copy" of the Odroid SPI pins on the 3.3v side (pin 16..19) , for connecting the Saleae.
As the Saleae won't trigger in 1.8v signals.

Code: Select all

-- Make the SPI signals available on the 3.3v side , for debugging
	mosi_3v3	<= mosi;
	--miso_3v3 <= miso;
	sclk_3v3	<= sclk;
	sel_3v3 	<= sel;
Pin 99/100 are for U3 1.8v serial , and pin 28/29 are for a 3.3v USB->Serial dongle.
The connection is done in VHDL here

Code: Select all

-- RS232 levelconversion  
  to_usb_rx <= from_u3_tx; -- Convert/Connect U3 1.8v RS232 tx from Bank2 to USB rx 3.3v out on Bank1
  to_u3_rx <= from_usb_tx; -- Convert/Connect USB 3.3v RS232 tx on Bank1 to U3 1.8v RS232 rx out on Bank2  

The VHDL source doesn't reflect the pin assignments , that's done the the "pin planner" (see the attached pin file)
Where the Altera Fitter reports the relationship between VHDL Signals and mapped pins.
There you'll also se if it's mapped to a 3.3v or 1.8v IO bank

/Bingo
Last edited by Bingo on Mon Apr 06, 2015 1:45 am, edited 1 time in total.

Bingo
Posts: 73
Joined: Thu Dec 04, 2014 5:46 pm
languages_spoken: english
ODROIDs: odroid-u3 & odroid-c1/c2
Location: Denmark
Has thanked: 0
Been thanked: 0
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by Bingo » Sat Apr 04, 2015 9:27 pm

For the hardware guyzz

Here is the QuartusII RTL viewer output.
That's how the VHDL code is implemented in the hardware, think "gates".
gz_16o8i-rtl.pdf
(27.81 KiB) Downloaded 241 times
And more from the CPLD's point of view (utilizing the Macro-cells in the CPLD) , the output from Technology Map Viewer
gz_16o8i-tmw.pdf
(70.13 KiB) Downloaded 245 times
VHDL s a way to describe how to build a electronic gate level circuit within the CPLD/FPGA.
And everything happens at the same time.

It's NOT like a programming language , where the programcounter can only be at one place at a time.

I'm a VHDL newbie , comming from an assembly/C background , and you'll have to think in a totally different way when doing VHDL.

That's why i'm gratefull for Guzunty making all the hard work , but i'm beginning to understand his cores now.

/Bingo

User avatar
odroid
Site Admin
Posts: 34109
Joined: Fri Feb 22, 2013 11:14 pm
languages_spoken: English, Korean, Japanese
ODROIDs: ODROID
Has thanked: 666 times
Been thanked: 611 times
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by odroid » Sun Apr 05, 2015 12:30 am

Wow! thank you for the valuable information.

Almost 15 years ago, I had a couple of projects with some FPGAs. I used the Xilinx Spartan-II series with Verilog.
But I can't recall almost anything. :)

Bingo
Posts: 73
Joined: Thu Dec 04, 2014 5:46 pm
languages_spoken: english
ODROIDs: odroid-u3 & odroid-c1/c2
Location: Denmark
Has thanked: 0
Been thanked: 0
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by Bingo » Sun Apr 05, 2015 2:09 am

Afaik the SpartanII even was 5v tolerant , i don't think ANY Fpga's are 5v tolerant today

/Bingo

Bingo
Posts: 73
Joined: Thu Dec 04, 2014 5:46 pm
languages_spoken: english
ODROIDs: odroid-u3 & odroid-c1/c2
Location: Denmark
Has thanked: 0
Been thanked: 0
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by Bingo » Sun Apr 05, 2015 4:10 am

Download Altera QuartusII 13.0sp1 here - Warning we're talking 4.5GB of data.
Do NOT get a version higher than 13.0sp1, it won't rekognize the MAXII CPLD
http://dl.altera.com/13.0sp1/?edition=web

I'm using the Linux 64bit version.
http://dl.altera.com/13.0sp1/?edition=w ... form=linux

Windows version
http://dl.altera.com/13.0sp1/?edition=w ... rm=windows

I recommend the Windows version for most users.
The linux version have to be "helped" , unless you're using a Redhat/Centos system.


There is also a standalone programmer (140MB) (in the individual files tab) , for people that just want to use an existing core.

The Guzunty trick where they use the MCU ip-pins to program the CPLD , is undoable on the U3 , there aren't pins enough , and i'm not sure the jtag pins are 1.8v compatible.

So you'd need to buy the $7 programer also.

If someone feels for it, a C1 could be made into a JAM STAPL programmer, but that's a lot of work to save 7$.

Basic/beginner VHDL Course , i took this course this summer.
And "got my hands dirty" for the first time.
http://www.pyroelectro.com/edu/fpga/
It's an excellent course

I used the Blue EPM240 board instead of the one used in the course, as the shipping to EU was to expensive.
And i got a lot more logic with the EPM240 board
/Bingo

Bingo
Posts: 73
Joined: Thu Dec 04, 2014 5:46 pm
languages_spoken: english
ODROIDs: odroid-u3 & odroid-c1/c2
Location: Denmark
Has thanked: 0
Been thanked: 0
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by Bingo » Sun Apr 05, 2015 9:58 pm

I have the serial console (runs 115200 bps) up & running with a cheap 2$ USB->Serial converter on Putty
Here's the output:
Console.png
Console.png (10.84 KiB) Viewed 13150 times
Here's a console log of my U3 boot:
Console-boot.txt.zip
(9.58 KiB) Downloaded 123 times

The U3 uart plug, snipped from the schematic
U3-Uart-plug.png
U3-Uart-plug.png (5.41 KiB) Viewed 13148 times
/Bingo
Last edited by Bingo on Mon Apr 06, 2015 12:06 am, edited 1 time in total.

Bingo
Posts: 73
Joined: Thu Dec 04, 2014 5:46 pm
languages_spoken: english
ODROIDs: odroid-u3 & odroid-c1/c2
Location: Denmark
Has thanked: 0
Been thanked: 0
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by Bingo » Sun Apr 05, 2015 10:03 pm

A "snip" from the QuartusII CPLD pin assignment file (that i have specified to quartus) : http://forum.odroid.com/download/file.php?id=2115
Reveals that the user has to connect U3 serial to pin 99/100 , and USB-Serial adapter serial to pin 28/29

Code: Select all

from_usb_tx                  : 28        : input  : 3.3-V LVTTL       :         : 1         : Y              
to_usb_rx                    : 29        : output : 3.3-V LVTTL       :         : 1         : Y 

from_u3_tx                   : 99        : input  : 1.8 V             :         : 2         : Y              
to_u3_rx                     : 100       : output : 1.8 V             :         : 2         : Y 
 
Here are some pics of the serial connections

The red + brown , going to the "top left corner" of the cpld board (pin 99/100) are the 1.8v console rx/tx from the U3.
Console1.jpg
Console1.jpg (144.49 KiB) Viewed 13149 times
Here's the cheap *bay usb-serial adapter , with 3 wires connected to the CPLD board.
Black = GND
Yellow = 3.3v TX
Green = 3.3v RX
Console3.jpg
Console3.jpg (148.86 KiB) Viewed 13149 times
Another view.
Console4.jpg
Console4.jpg (149.23 KiB) Viewed 13149 times
/Bingo
Last edited by Bingo on Mon Apr 06, 2015 1:47 am, edited 1 time in total.

Bingo
Posts: 73
Joined: Thu Dec 04, 2014 5:46 pm
languages_spoken: english
ODROIDs: odroid-u3 & odroid-c1/c2
Location: Denmark
Has thanked: 0
Been thanked: 0
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by Bingo » Sun Apr 05, 2015 10:31 pm

As i succeded (with help from our mod odroid), in reducing the SPI Clock.
My Saleae Logic is able to capture the SPI communication now.

Here are a few captures:

Here is the SPI transaction from the "Toggling all outputs" loop in the section of the gz_16o8i.c test program.
You can see (on MOSI) that the 2x8 output pins are programmed with 0xFF 0xFF , and then with 0x00 0x00.
The 0x00's will turn al bits off , and the 0xFF will turn al bits on.

You can also see the 8-bit input port being read (for each 8 output bits) , and that the values are 0x7D and 0x3D.
The difference is because the input ports are floating, (*note to self ... check if there are pullup/down capabilities in the CPLD)
Toggle-ff-00.png
Toggle-ff-00.png (60.61 KiB) Viewed 13149 times
Here you see the "SPI alternate outputs" 0x55 0x55 and 0xAA 0xAA
Spi-Alternate.png
Spi-Alternate.png (58.14 KiB) Viewed 13149 times

Re: (*note to self ... check if there are pullup/down capabilities in the CPLD)
I found weak pullups and enabled them on all inputs in the assignment editor.
Quartus-assignment.editor-weak-pullup.png
Quartus-assignment.editor-weak-pullup.png (118 KiB) Viewed 13142 times
/Bingo
Last edited by Bingo on Wed Apr 15, 2015 3:52 am, edited 2 times in total.

Bingo
Posts: 73
Joined: Thu Dec 04, 2014 5:46 pm
languages_spoken: english
ODROIDs: odroid-u3 & odroid-c1/c2
Location: Denmark
Has thanked: 0
Been thanked: 0
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by Bingo » Sun Apr 05, 2015 10:50 pm

I removed the 100.000us delay lines from the sourcecode, to check how fast i could toggle the 16 io pins.

First with a 1MHz spiclk.
Spiclk-1MHz.png
Spiclk-1MHz.png (7.81 KiB) Viewed 13149 times
IO toggle speed - 1MHz spiclk
IOtoggle-1MHz.png
IOtoggle-1MHz.png (7.2 KiB) Viewed 13149 times
Seems like a 10.42KHz toggle speed is possible.

I'll have to show the 10MHz spiclk in the next post , as i can only attach 3 pics per post.

Ohh:
I haven't been very nice with the grounding of the scopeprobes, that's why we have most of the ringing.
But maybe a 100R in series with the spiclk would help dampen the ringing also.


/Bingo
Last edited by Bingo on Sun Apr 05, 2015 11:01 pm, edited 1 time in total.

Bingo
Posts: 73
Joined: Thu Dec 04, 2014 5:46 pm
languages_spoken: english
ODROIDs: odroid-u3 & odroid-c1/c2
Location: Denmark
Has thanked: 0
Been thanked: 0
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by Bingo » Sun Apr 05, 2015 10:57 pm

Here are the IO toggle rate with a 10Mhz spiclk

10MHz spiclk.
Spiclk-10MHz.png
Spiclk-10MHz.png (8.29 KiB) Viewed 13149 times
IO toggle speed - 10MHz spiclk
IOtoggle-10MHz.png
IOtoggle-10MHz.png (7.85 KiB) Viewed 13149 times
With 10 MHz it seems like a 15.82KHz toggle speed is possible

Note that we have increased spiclk by a factor 10 , but only got a little increase in the toggle clock.

This indicates that there must be a lot of overhead in the Linux SPI calls.


But 15KHz toggle rate is fine for many purposes ie. leds & buttons.
If you need more speed , make a VHDL core to do some highspeed stuff, you have a 50Mhz onboard CPLD oscillator and 192MacroCells's (mc).

A simpler approach would be to connect a 3.3v Arduino via the other U3 Uart , and just extend the core to levelshift the 2 x 2 extra pins.

Note to self
I just remembered the gz_16o8i.c program checks for keypress and uses curses.
That costs a lot of U3 cycles.
I might try to do the toggle in a tight SPI only loop , and would expect the toggle rate to increase.

/Bingo
Last edited by Bingo on Wed Apr 15, 2015 3:54 am, edited 1 time in total.

Bingo
Posts: 73
Joined: Thu Dec 04, 2014 5:46 pm
languages_spoken: english
ODROIDs: odroid-u3 & odroid-c1/c2
Location: Denmark
Has thanked: 0
Been thanked: 0
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by Bingo » Mon Apr 06, 2015 3:18 am

A question for the Linux Guru's

Right now i have to run the gz_16o8i program as root, in order to open the SPI device.

Is there any group that i can be member of (like dialout for /dev/tty access) , in order to be able to run the program as a normal user ?

Well ansvering my own post:

Got the hint here.
https://www.linux.com/learn/tutorials/7 ... one-black/

Scanned for spi devices

Code: Select all

ls -lR /sys/devices/ | grep -i spi | less
Ran

Code: Select all

udevadm test /sys/devices/platform/exynos4210-spi.1/spi_master/spi1/spi1.0/spidev/spidev1.0
Got

Code: Select all

DEVNAME=/dev/spidev1.0
DEVPATH=/devices/platform/exynos4210-spi.1/spi_master/spi1/spi1.0/spidev/spidev1.0
MAJOR=153
MINOR=0
SUBSYSTEM=spidev
Create a new spidev system group

sudo groupadd -f --system spidev
sudo usermod -a -G spidev username -- replace username with your odroid username

Made a udev rule for the spidev system , allowing access to members of the group spidev.

Code: Select all

# cat /etc/udev/rules.d/99-spidev.rules

Code: Select all

#
# /etc/udev/rules.d/99-spidev.rules
#
#  Allow access for the group members of spidev , in order to be able to access SPI as a normal user
#
SUBSYSTEM=="spidev", MODE="660", GROUP="spidev"
#


Now spidev members have r/w access to the spidev subsystem

Code: Select all

# ls /dev/spi* -l
crw-rw---T 1 root spidev 153, 0 Apr  5 21:39 /dev/spidev1.0
 

/Bingo

Bingo
Posts: 73
Joined: Thu Dec 04, 2014 5:46 pm
languages_spoken: english
ODROIDs: odroid-u3 & odroid-c1/c2
Location: Denmark
Has thanked: 0
Been thanked: 0
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by Bingo » Sun May 10, 2015 9:07 pm

Full Altera Quartus Project for the Guzunty Pi gz_16o8i in zip attachment
gz_16o8i-3v3-1v8.zip
(251.33 KiB) Downloaded 147 times
And the pin file gz_16o8i.pin.txt , here with .txt added to the extension for the sake of the upload system.
gz_16o8i.pin.txt
Pinout file
(14.68 KiB) Downloaded 163 times
And the pinfile as .csv.
gz_16o8i.csv
Pin file as csv
(2.48 KiB) Downloaded 168 times
The Pin file is essential , as this file tells what pins the VHDL signals are mapped to.
Without the pinout file it's impossible to use the design , as you have no idea where to connect the signals.

/Bingo

Bingo
Posts: 73
Joined: Thu Dec 04, 2014 5:46 pm
languages_spoken: english
ODROIDs: odroid-u3 & odroid-c1/c2
Location: Denmark
Has thanked: 0
Been thanked: 0
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by Bingo » Sat May 16, 2015 1:22 pm

Quartus settings

Quartus defaults to setting unused pins as output driving GND , that's a problem with the onboard "unused" oscillator.
We set unused pins to : input , tristated with weak pullups
Quartus-unused-tri-pu.png
Quartus-unused-tri-pu.png (78.24 KiB) Viewed 12778 times
We set all inputs in the design as having weak pullups, this is done in the assignment editor
Quartus-assignment.editor-weak-pullup.png
Quartus-assignment.editor-weak-pullup.png (118 KiB) Viewed 12778 times
Then we build the design , and program it.
Quartus-Programmer.png
Quartus-Programmer.png (73.17 KiB) Viewed 12778 times

Bingo
Posts: 73
Joined: Thu Dec 04, 2014 5:46 pm
languages_spoken: english
ODROIDs: odroid-u3 & odroid-c1/c2
Location: Denmark
Has thanked: 0
Been thanked: 0
Contact:

Re: Guzunty Pi for Odroid(s) - U3 now

Post by Bingo » Sat May 16, 2015 1:26 pm

The enabling of weak pullups on the inputs , also solves the previous problem where the input ports were unstable

Now they're always read as 1's unless pulled down by an external connection.

Here i have connected bit 2 on the input port to GND , and shows the screen of the input test section of the gz_16o8i.c program
Input-test.png
Input-test.png (556 Bytes) Viewed 12778 times

Post Reply

Return to “Hardware and peripherals”

Who is online

Users browsing this forum: No registered users and 3 guests