SPI boot by phase my progress

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SPI boot by phase my progress

Unread postby phaseshifter » Tue Apr 10, 2018 2:31 am

so i got the device connected just some pics as what i have so far....

running petitboot
i had to launch pb-discover in one terminal then petitboot-nc in another

i am making progress....
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Last edited by phaseshifter on Sat Apr 14, 2018 9:04 pm, edited 1 time in total.
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Re: SPI boot by phase my progress

Unread postby phaseshifter » Tue Apr 10, 2018 2:49 am

if somebody could give me the link to transfer the root/fs to hdd that would be great...thank`s..
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Re: SPI boot by phase my progress

Unread postby phaseshifter » Wed Apr 11, 2018 7:56 am

well i have petitboot working
what i do need is to know how to enable the device so that the spi module is loaded
and sees my device
i know it has to do with it being loaded into the kernel
i also see there is a patch that joy posted but i dont know how to install it into the software
i am guessing that this is the fix for my problem..maddy met with the same issue
so if any body can help me with this i would be thankful ...

...phase

p.s..if somebody could post me a working kernel and dts file that would be very helpfull indeed..

or whatever boot files that are required after the make of the updated kernel....
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Re: SPI boot by phase my progress

Unread postby hominoid » Wed Apr 11, 2018 11:52 am

@phaseshifter, You need to apply the patch that @joy provided and then rebuild the kernel. Here are the steps I used for a native build on the Odroid-N1; make sure you have anything of value on your N1 backed up in case things go bad.

I believe these are the only apps you need for a native build. You might also need libssl-dev, not sure; I do have it installed.
Code: Select all
sudo apt-get install git gcc g++ build-essential

download the patch (diff file) that @joy provide to your ~/
Code: Select all
cd ~
unzip 0003_n1_spi_mtd_config_dts.diff.zip
git clone https://github.com/hardkernel/linux -b odroidn1-4.4.y
mv linux linux-odroidn1-4.4.114
cd linux-odroidn1-4.4.114

You can use the following command to verify the version of kernel
Code: Select all
head -n 5 Makefile
 VERSION = 4
 PATCHLEVEL = 4
 SUBLEVEL = 114
 EXTRAVERSION =
 NAME = Blurry Fish Butt

Code: Select all
make distclean
patch -p1 < ../0003_n1_spi_mtd_config_dts.diff
make odroidn1_defconfig
make Image dtbs -j5
sudo cp arch/arm64/boot/Image /media/boot/Image
sudo cp arch/arm64/boot/dts/rockchip/rk3399-odroidn1-linux.dtb /media/boot/rk3399-odroidn1-linux.dtb
sudo make modules
sudo make modules_install
sudo cp .config /boot/config-`cat include/config/kernel.release`
sudo update-initramfs -c -k `cat include/config/kernel.release`
sudo mkimage -A arm -O linux -T ramdisk -C none -a 0 -e 0 -n uInitrd -d /boot/initrd.img-`cat include/config/kernel.release` /boot/uInitrd-`cat include/config/kernel.release`
sudo cp /media/boot/uInitrd /boot/uInitrd-`uname -r`
sudo cp /boot/uInitrd-`cat include/config/kernel.release` /media/boot/uInitrd
sync
sudo reboot

Here is what you should see in dmesg
Code: Select all
hominoid@odroid-n1:~$ dmesg | grep spi
[    2.032005] rockchip-spi ff1d0000.spi: Failed to request TX DMA channel
[    2.038634] rockchip-spi ff1d0000.spi: Failed to request RX DMA channel
[    2.045756] m25p80 spi32766.0: w25q128 (16384 Kbytes)

Code: Select all
sudo apt install mtd-utils

Code: Select all
hominoid@odroid-n1:~$ sudo mtdinfo /dev/mtd0
mtd0
Name:                           spi32766.0
Type:                           nor
Eraseblock size:                4096 bytes, 4.0 KiB
Amount of eraseblocks:          4096 (16777216 bytes, 16.0 MiB)
Minimum input/output unit size: 1 byte
Sub-page size:                  1 byte
Character device major/minor:   90:0
Bad blocks are allowed:         false
Device is writable:             true

Code: Select all
hominoid@odroid-n1:~$ sudo flash_eraseall /dev/mtd0
flash_eraseall has been replaced by `flash_erase <mtddev> 0 0`; please use it
Erasing 4 Kibyte @ fff000 -- 100 % complete

Let me know if it worked out for you.

EDIT: added make modules
Last edited by hominoid on Thu Apr 12, 2018 10:23 pm, edited 1 time in total.
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Re: SPI boot by phase my progress

Unread postby phaseshifter » Thu Apr 12, 2018 1:53 am

thank you i shall try that today at some point..@hominoid

i got plenty of emmc`s i`ll start with a fresh flash/image when i do ..no prob`s...
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Re: SPI boot by phase my progress

Unread postby mad_ady » Thu Apr 12, 2018 2:26 am

I'll try it as well. I hadn't recompiled the kernel. Thought that stock was enough.
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Re: SPI boot by phase my progress

Unread postby hominoid » Thu Apr 12, 2018 3:28 am

mad_ady wrote:I'll try it as well. I hadn't recompiled the kernel. Thought that stock was enough.

The stock kernel won't work, no SPI or NOR enabled which is what the patch is doing, turning it on. Also, here is a great video showing techniques to solder surface mount components with standard soldering tools. It was very beneficial in trying to hone my skills a few years back.
Let me know things go...
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Re: SPI boot by phase my progress

Unread postby phaseshifter » Thu Apr 12, 2018 6:17 am

this line tells me that the file cannot be create as it already exists

Code: Select all
sudo update-initramfs -c -k `cat include/config/kernel.release`
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Re: SPI boot by phase my progress

Unread postby phaseshifter » Thu Apr 12, 2018 6:36 am

all other commands seem to work but still something is wrong

when i reboot it takes me into maintenance mode so i think it`s most likely some syntax errors ...not shure i have found a couple and fixed them but it`s still crashing to a point..

oh it can see the spi in the grep spi..so that is one good thing..

EDIT i cannot install mtd utils etc as the network does not come up
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Re: SPI boot by phase my progress

Unread postby phaseshifter » Thu Apr 12, 2018 6:57 am

Code: Select all
[  OK  ] Stopped Emergency Shell.
[FAILED] Failed to mount /media/boot.
See 'systemctl status media-boot.mount' for details.
[DEPEND] Dependency failed for Local File Systems.
         Starting Update UTMP about System Runlevel Changes...
[  OK  ] Closed Syslog Socket.
[  OK  ] Started Emergency Shell.
[  OK  ] Reached target Emergency Mode.
[  OK  ] Started Update UTMP about System Runlevel Changes.
[   16.713945] random: nonblocking pool is initialized
You are in emergency mode. After logging in, type "journalctl -xb" to view
system logs, "systemctl reboot" to reboot, "systemctl default" or ^D to
try again to boot into default mode.
Give root password for maintenance
(or press Control-D to continue):
ed to mount /media/boot.
See 'systemctl status media-boot.mount' for details.
[DEPEND] Dependency failed for Local File Systems.
         Starting Update UTMP about System Runlevel Changes...
[  OK  ] Closed Syslog Socket.
[  OK  ] Started Emergency Shell.
[  OK  ] Reached target Emergency Mode.
[  OK  ] Started Update UTMP about System Runlevel Changes.
[   16.713945] random: nonblocking pool is initialized
You are Login incorrect

in emergency modGive root password for maintenance
e. After logging(or press Control-D to continue):
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Re: SPI boot by phase my progress

Unread postby hominoid » Thu Apr 12, 2018 7:06 am

phaseshifter wrote:this line tells me that the file cannot be create as it already exists

Code: Select all
sudo update-initramfs -c -k `cat include/config/kernel.release`

No big deal. If you started and stopped the command or if it preexisted it won't over write it, delete or rename it in then re-run the command. I believe It is in /boot.
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Re: SPI boot by phase my progress

Unread postby phaseshifter » Thu Apr 12, 2018 8:13 am

r
Code: Select all
oot@odroid:~/linux-odroidn1-4.4.114# update-initramfs  -t  -c -k `cat include/config/kernel.release`
update-initramfs: Generating /boot/initrd.img-4.4.114
depmod: WARNING: could not open /var/tmp/mkinitramfs_eEiU0f/lib/modules/4.4.114/modules.order: No such file or directory
depmod: WARNING: could not open /var/tmp/mkinitramfs_eEiU0f/lib/modules/4.4.114/modules.builtin: No such file or directory
root@odroid:~/linux-odroidn1-4.4.114#
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Re: SPI boot by phase my progress

Unread postby hominoid » Thu Apr 12, 2018 8:37 am

Rebooting before you had a working kernel caused problems. The easiest way to fix this is to re-flash the emmc and start over. Before you start the kernel build process check to make sure there are no files with only 4.4.114 appended in /boot or /media/boot. If there are delete them. You should see the current kernel files at those locations with 4.4.114.21 for example which are ok. That's the kernel your running on and should match the output of the command uname -a. The process is trying to create files with only 4.4.114 appended to the end; previously there must have been one or one was created by cancelling out of a command maybe. Once the rebuild is done the new kernel will be 4.4.114 with no other extension e.g. 4.4.114.xx
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Re: SPI boot by phase my progress

Unread postby mad_ady » Thu Apr 12, 2018 8:16 pm

@hominid - your instructions don't mention make modules before make modules_install, so that's why @phaseshifter got stuck.

Also - it seems my soldering is not that bad after all:
Code: Select all
odroid@n1-pre:~$ sudo mtdinfo /dev/mtd0
mtd0
Name:                           spi32766.0
Type:                           nor
Eraseblock size:                4096 bytes, 4.0 KiB
Amount of eraseblocks:          4096 (16777216 bytes, 16.0 MiB)
Minimum input/output unit size: 1 byte
Sub-page size:                  1 byte
Character device major/minor:   90:0
Bad blocks are allowed:         false
Device is writable:             true

odroid@n1-pre:~$ sudo flash_eraseall /dev/mtd0
flash_eraseall has been replaced by `flash_erase <mtddev> 0 0`; please use it
Erasing 4 Kibyte @ fff000 -- 100 % complete



Where's the party at? :D
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Re: SPI boot by phase my progress

Unread postby hominoid » Thu Apr 12, 2018 10:26 pm

That would be important! I added make modules, thanks for the correction.
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Re: SPI boot by phase my progress

Unread postby phaseshifter » Fri Apr 13, 2018 10:28 pm

ok now the code worked it boots up properly to a point but still have an 1 issue`s

sf probe reports

input must be a single directory

mtd shows figures and so does grep |spi..all good so far had a tx/rx wrong..fixed..
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Re: SPI boot by phase my progress

Unread postby moon.linux » Sat Apr 14, 2018 4:04 am

@phaseshifter is this external spi flash device attached to N1 ?
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Re: SPI boot by phase my progress

Unread postby phaseshifter » Sat Apr 14, 2018 4:09 am

ok so the protoboard has the hold and wp held high

to stop erase cycles all you need to do is remove the cs wire to the board and the chip cannot be written to...

so i am hoping that it can be read from i guess so ..i have read through the notes well some of them any way on the chip and seems that cs does the both read ..and write control..

i just issued the mtd info and it came up with the chip ..but weather this is enough to say that the cs pin has done it`s job by removing it to read only will tell when i actually code the spi chip..

this is still giving me a headache as i am not 100% certain that i want to go with the said earlier in @mad_ady`s thread..


@ moon linux yes it is

EDITi put the kernel on hold as a kernel upgrade will not suffice..so..dont know exactly how or what h-k will do ..it may be behond my understanding

Code: Select all
apt-mark hold linux-odroidn1
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Re: SPI boot by phase my progress

Unread postby phaseshifter » Sat Apr 14, 2018 7:08 pm

ok so build.sh threw an error

./build.sh: line 7: tools/rk_tools/bin/loaderimage: cannot execute binary file: Exec format error
Image Type: Rockchip RK33 (SD/MMC) boot image
Data Size: 67584 bytes
./build.sh: line 14: tools/rk_tools/bin/trust_merger: cannot execute binary file: Exec format error
cp: cannot stat 'uboot.img': No such file or directory
cp: cannot stat 'trust.img': No such file or directory


from here in mad_addy`s thread

2. Download and Build (2) - eMMC/SD Target
For initial update to SPI Flash, eMMC/SD interfaces are considered.
From the same repository, you can build a new boot loader for eMMC/SD including SPI commands.

Code: Select all
$ cd u-boot
$ ./build.sh

from the uboot prompt i get this error

Code: Select all
 sf probe
Invalid bus 0 (err=-19)
Failed to initialize SPI flash at 0:0 (error -19)


also from a command prompt
sf probe throws this error
Code: Select all
input must be a singel directory


not shure how to get round these issues...



ok how do i load these files into "vfat"..???
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Re: SPI boot by phase my progress

Unread postby phaseshifter » Mon Apr 16, 2018 2:47 am

@mad_ady how did you get around this i have the same issue

viewtopic.php?f=155&t=29976&start=50#p219293
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Re: SPI boot by phase my progress

Unread postby mad_ady » Mon Apr 16, 2018 3:23 am

I only went as far as I could access /dev/mtd0 from the os. I haven't touched uboot, nor tested it yet. In theory you could put uboot, kernel, initrd and boot.ini there and have it boot, though I don't know what offsets need to be changed. Have you tried with petitboot?
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Re: SPI boot by phase my progress

Unread postby phaseshifter » Mon Apr 16, 2018 3:45 am

petitboot throws the same error..i never got ./build.sh to compile properly..it threw an error
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Re: SPI boot by phase my progress

Unread postby rooted » Mon Apr 16, 2018 3:49 am

Someone could send it to you.
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Re: SPI boot by phase my progress

Unread postby mad_ady » Mon Apr 16, 2018 4:09 am

The cannot execute binary problem sounds like the problem with compiling uboot for xu4. It would fail on the xu4 because it needs to run an intel binary to sign it or something. The way around it is to have qemu installed because it allows you to run intel binaries.
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Re: SPI boot by phase my progress

Unread postby phaseshifter » Mon Apr 16, 2018 4:38 am

install qemu and ran it again i get this....

Code: Select all
./build.sh: line 7: tools/rk_tools/bin/loaderimage: cannot execute binary file: Exec format error
Image Type:   Rockchip RK33 (SD/MMC) boot image
Data Size:    67584 bytes
./build.sh: line 14: tools/rk_tools/bin/trust_merger: cannot execute binary file: Exec format error
cp: cannot stat 'uboot.img': No such file or directory
cp: cannot stat 'trust.img': No such file or directory
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Re: SPI boot by phase my progress

Unread postby hominoid » Mon Apr 16, 2018 12:36 pm

phaseshifter wrote:petitboot throws the same error..i never got ./build.sh to compile properly..it threw an error

Here is my update:
I tried to compile u-boot native on the N1 and had a dependence issue. I then decided to move to a x86 ubuntu box and got both ./build_spi.sh and ./build.sh to build without errors. The sdfuse.sh looked good as well.
Code: Select all
  CC      spl/drivers/sysreset/sysreset-uclass.o
  CC      spl/drivers/sysreset/sysreset_rk3399.o
  LD      spl/drivers/sysreset/built-in.o
  LD      spl/drivers/built-in.o
  LDS     spl/u-boot-spl.lds
  LD      spl/u-boot-spl
  OBJCOPY spl/u-boot-spl-nodtb.bin
  CAT     spl/u-boot-spl-dtb.bin
  COPY    spl/u-boot-spl.bin
  MKIMAGE u-boot.img
  MKIMAGE u-boot-dtb.img
  CFGCHK  u-boot.cfg
pack input ./u-boot-dtb.bin
pack file size: 573896
crc = 0x9bd34a1f
uboot version: U-Boot 2014.10-RK3399-06-02328-g7d5806c (Apr 10 2017 - 16:46:25)
pack uboot.img success!
Image Type:   Rockchip RK33 (SD/MMC) boot image
Data Size:    67584 bytes
out:trust.img
merge success(trust.img)
hominoid@c6n1:~/u-boot$ cd sd_fuse
hominoid@c6n1:~/u-boot/sd_fuse$ ls
idbloader.img  idbspl.bin  rk3399_loader_v1.08.106.bin  sdfuse.sh  trust.img  uboot.img  u-boot.itb
hominoid@c6n1:~/u-boot/sd_fuse$ ./sdfuse.sh /dev/sdb
279+1 records in
279+1 records out
142980 bytes (143 kB, 140 KiB) copied, 0.0250435 s, 5.7 MB/s
8192+0 records in
8192+0 records out
4194304 bytes (4.2 MB, 4.0 MiB) copied, 0.903689 s, 4.6 MB/s
8192+0 records in
8192+0 records out
4194304 bytes (4.2 MB, 4.0 MiB) copied, 0.871532 s, 4.8 MB/s
finished
hominoid@c6n1:~/u-boot/sd_fuse$ sync
hominoid@c6n1:~/u-boot/sd_fuse$ sync
hominoid@c6n1:~/u-boot/sd_fuse$ sudo eject /dev/sdb


When I booted to the N1, at the u-boot prompt I could burn the kernel and everything to the SPI-NOR just fine...almost there!
Code: Select all
U-Boot 2017.07-g12f5cec (Apr 13 2018 - 20:55:34 -0400)

Model: Hardkernel ODROID-N1
DRAM:  3.9 GiB
MMC:   dwmmc@fe320000: 1, sdhci@fe330000: 0
In:    serial@ff1a0000
Out:   serial@ff1a0000
Err:   serial@ff1a0000
U-Boot 2017.07-g12f5cec (Apr 13 2018 - 20:55:34 -0400)

Model: Hardkernel ODROID-N1
Net:   
Error: ethernet@fe300000 address not set.
No ethernet found.
Hit any key to stop autoboot:  0
# setenv loadaddr 0x400000
# sf probe
SF: Detected w25q128bv with page size 256 Bytes, erase size 4 KiB, total 16 MiB
# fatload mmc 0 $loadaddr idbspl.bin
reading idbspl.bin
200704 bytes read in 38 ms (5 MiB/s)
# sf write $loadaddr 0x8000 $filesize
device 0 offset 0x8000, size 0x31000
SF: 200704 bytes @ 0x8000 Written: OK
# fatload mmc 0 $loadaddr u-boot.itb
reading u-boot.itb
789828 bytes read in 100 ms (7.5 MiB/s)
# sf write $loadaddr 0x40000 $filesize
device 0 offset 0x40000, size 0xc0d44
SF: 789828 bytes @ 0x40000 Written: OK
# fatload mmc 0 $loadaddr Image.gz
reading Image.gz
5357052 bytes read in 583 ms (8.8 MiB/s)
# sf write $loadaddr 0x142000 $filesize
device 0 offset 0x142000, size 0x51bdfc
SF: 5357052 bytes @ 0x142000 Written: OK
# fatload mmc 0 $loadaddr rk3399-odroidn1-linux.dtb
reading rk3399-odroidn1-linux.dtb
72839 bytes read in 28 ms (2.5 MiB/s)
# sf write $loadaddr 0x842000 $filesize
device 0 offset 0x842000, size 0x11c87
SF: 72839 bytes @ 0x842000 Written: OK
# fatload mmc 0 $loadaddr uInitrd
reading uInitrd
5421505 bytes read in 579 ms (8.9 MiB/s)
# sf write $loadaddr 0x853800 $filesize
device 0 offset 0x853800, size 0x52b9c1
SF: 5421505 bytes @ 0x853800 Written: OK

# U-Boot SPL board init
SF: unrecognized JEDEC id bytes: f7, a0, 0c
Trying to boot from MMC2
"Synchronous Abort" handler, esr 0x02000000
ELR:     1000
LR:      ff8c920c
x 0: 00000000ff8e0000 x 1: 0000000000000000
x 2: 0000000000001000 x 3: 0000000000000002
x 4: 00000000ff8e0180 x 5: 0000000000000030
x 6: 0000000000000180 x 7: 0000000000000003
x 8: 000000000000253c x 9: 0000000000000000
x10: 000000000007fcbc x11: 00000000ff8d77f0
x12: 000000000000205c x13: 0000000000000000
x14: 00000000ff8d77f0 x15: 0000000000003f7c
x16: 0000000004340000 x17: 0000000004340000
x18: 00000000ff8ebe90 x19: 00000000ff8d7070
x20: 00000000ff8d7028 x21: 0000000000000000
x22: 00000000ff8d548c x23: 000000000007fe58
x24: 00000000ff8d5474 x25: 00000000ff8d7000
x26: 00000000deadbeef x27: 00000000000004c4
x28: 00000000000000c0 x29: 000000000007fdf0

Resetting CPU ...


When I tried to boot to the SPI-NOR I got a cyclical reboot with the indicated error. In trying to figure it out I decide I would back track and try to figure out the native u-boot compile issue by starting with a fresh copy of the N1 image. Spent a bunch of time with this problem. And through that process my keyboard cord and my breakout board had an altercation and the SPI-NOR chip lost.
S1610011.jpg
S1610011.jpg (69.45 KiB) Viewed 3058 times
It became unstable and unwriteable in it's upper region. So I need to solder up another SPI-NOR chip on a break out board. In the mean time I realized that I had setup improperly for an AMR64 crosscompile of the u-boot which is what is mostlikely causing the boot error on the N1. The sd_fuse was x86 code not arm64. :lol: And to keep things interesting a spring blizzard blew in with 40+MPH winds and 2 feet of snow and it's still coming. :o So I had to stop and take care of things on the home front to deal with mother nature. Once I get back to making up another chip, setting up for a proper cross-compile and shoveling snow...I'll let you know how the rest goes including the Petitboot build. :)
Last edited by hominoid on Mon Apr 16, 2018 10:28 pm, edited 1 time in total.
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Re: SPI boot by phase my progress

Unread postby mad_ady » Mon Apr 16, 2018 3:46 pm

Good luck shoveling! But I always had the impression you were from Australia and it's not winter there yet :)
Am I wrong?
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Re: SPI boot by phase my progress

Unread postby hominoid » Mon Apr 16, 2018 10:31 pm

mad_ady wrote:Good luck shoveling! But I always had the impression you were from Australia and it's not winter there yet :)
Am I wrong?

American in the Great Lakes region (Lake Superior) near the Canadian border.
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Re: SPI boot by phase my progress

Unread postby rooted » Tue Apr 17, 2018 12:08 am

hominoid wrote:
mad_ady wrote:Good luck shoveling! But I always had the impression you were from Australia and it's not winter there yet :)
Am I wrong?

American in the Great Lakes region (Lake Superior) near the Canadian border.
Oh no, another one of those filthy American's. Kidding of course (I'm American) but you know the flak we get :)
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Re: SPI boot by phase my progress

Unread postby phaseshifter » Tue Apr 17, 2018 1:27 am

Hmm very interesting @hominoid..when i was loading qemu i did notice that it seemed intel orientated..
not shure if that has anything to do with things
but as you spoke of ...it builds fine on an x86 machine..so is the package the wrong architecture that we are using for aarh64...
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Re: SPI boot by phase my progress

Unread postby mad_ady » Tue Apr 17, 2018 10:36 pm

I also spent a little time on compiling uboot. I followed the instructions from @joy: viewtopic.php?f=155&t=29976#p218209. You'll also need device-tree-compiler:
Code: Select all
# apt-get install device-tree-compiler
# git clone https://github.com/JeonghwaCho/u-boot.git -b odroidn1-v2017.07
# cd u-boot/
# ./build_spi.sh
# ls -l sd_fuse


In order to compile for sd/emmc and sign the image (directly on the N1), I installed qemu and recompiled the kernel for BINFMT_MISC support: CONFIG_BINFMT_MISC=y. I also added KEXEC support (CONFIG_KEXEC_CORE=y,CONFIG_KEXEC=y). You need to reboot into the new kernel
Code: Select all
# file tools/rk_tools/bin/loaderimage
# apt-get install qemu-system-x86 qemu binfmt-support qemu-user-static
# update-binfmts --display| grep x86_64

Once binfmt reports that x86_64 is enabled, we need to install libc for amd64:
Code: Select all
# sudo dpkg --add-architecture amd64
# apt-get update
# sudo apt-get install libc6:amd64


Now we can build it:
Code: Select all
# cd u-boot/
# ./build.sh


Installing on SD/EMMC:
1. make a backup and also create a gzip of the kernel image
Code: Select all
# cd /media/boot
# mkdir backup
# cp Image boot.ini rk3399-odroidn1-linux.dtb  uInitrd backup/
# gzip -k Image
# cd -


2. Copy idbspl.bin and u-boot.itb into VFAT into your eMMC/SD card.
Code: Select all
# cp idbspl.bin u-boot.itb /media/boot/


3. Fuse:
Code: Select all
# bash -x sdfuse.sh /dev/mmcblk1


4. Reboot with serial and sf probe should work (loaded from emmc/sd):
Code: Select all
# sf probe
SF: Detected w25q128bv with page size 256 Bytes, erase size 4 KiB, total 16 MiB

5. Flash the nand from uboot:
Code: Select all
# setenv loadaddr 0x400000
# sf probe
SF: Detected w25q128bv with page size 256 Bytes, erase size 4 KiB, total 16 MiB
# sf erase 0x0 0x1000000
SF: 16777216 bytes @ 0x0 Erased: OK
# fatload mmc 0 $loadaddr idbspl.bin
reading idbspl.bin
204800 bytes read in 38 ms (5.1 MiB/s)
# sf write $loadaddr 0x8000 $filesize
device 0 offset 0x8000, size 0x32000
SF: 204800 bytes @ 0x8000 Written: OK
# fatload mmc 0 $loadaddr u-boot.itb
reading u-boot.itb
788844 bytes read in 100 ms (7.5 MiB/s)
# sf write $loadaddr 0x40000 $filesize
device 0 offset 0x40000, size 0xc096c
SF: 788844 bytes @ 0x40000 Written: OK
# fatload mmc 0 $loadaddr Image.gz
reading Image.gz
5373013 bytes read in 581 ms (8.8 MiB/s)
# sf write $loadaddr 0x142000 $filesize
device 0 offset 0x142000, size 0x51fc55
SF: 5373013 bytes @ 0x142000 Written: OK
# fatload mmc 0 $loadaddr rk3399-odroidn1-linux.dtb
reading rk3399-odroidn1-linux.dtb
72839 bytes read in 25 ms (2.8 MiB/s)
# sf write $loadaddr 0x842000 $filesize
device 0 offset 0x842000, size 0x11c87
SF: 72839 bytes @ 0x842000 Written: OK
# fatload mmc 0 $loadaddr uInitrd
reading uInitrd
5421546 bytes read in 586 ms (8.8 MiB/s)
# sf write $loadaddr 0x853800 $filesize
device 0 offset 0x853800, size 0x52b9ea
SF: 5421546 bytes @ 0x853800 Written: OK


When you're ready, reset the board - but it bootloops for me as well:
Code: Select all
# reset�U-Boot SPL board init
SF: unrecognized JEDEC id bytes: ff, e0, 1c
Trying to boot from MMC2
"Synchronous Abort" handler, esr 0x8a000000
ELR:     100000002
LR:      100000002
x 0: 00000000ff8d70a0 x 1: 0000000000000000
x 2: 00000000ff8dffff x 3: 000000000007fde8
x 4: 0000000000000000 x 5: 0000000000000018
x 6: 0000000000000030 x 7: 0000000000000001
x 8: 0000000000000003 x 9: 0000000000000000
x10: 000000000000253c x11: 000000000007fc9c
x12: 00000000ff8d7868 x13: 000000000000205c
x14: 0000000000000000 x15: 00000000ff8d7868
x16: 0000000000000001 x17: 0000000002340000
x18: 00000000ff8ebe90 x19: 00000000ff8c2000
x20: 00000000000004c8 x21: 0000000000000000
x22: 0000000000000000 x23: 0000000000000002
x24: 00000000ff8d4e5c x25: 00000000ff8d7000
x26: 00000000ff8d70e8 x27: 00000000deadbeef
x28: 00000000000000c4 x29: 0000000000000000

Resetting CPU ...


I have to pull the power to bypass the flash chip.
It looks to me that it can't find a signature in the flash and tries to boot from mmc2 but something crashes...
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Re: SPI boot by phase my progress

Unread postby mad_ady » Tue Apr 17, 2018 10:52 pm

Update: It seems that there are problems while reading the chip from linux. Most of the time the kernel will panic with a soft lockup (need to disable those I guess):
Code: Select all
root@n1-pre:~# [   56.086490] NMI watchdog: BUG: soft lockup - CPU#4 stuck for 23s! [binwalk:1061]
[   56.093893] Modules linked in: af_packet nls_cp936 vfat fat rock_gpiomem netconsole autofs4 btrfs xor zlib_deflate raid6_pq
[   56.105232]
[   56.106724] CPU: 4 PID: 1061 Comm: binwalk Not tainted 4.4.114 #2
[   56.112808] Hardware name: Hardkernel ODROID-N1 (DT)
[   56.117772] task: ffffffc0df5d0000 task.stack: ffffffc0ef5e0000
[   56.123700] PC is at rockchip_spi_transfer_one+0x400/0x4c0
[   56.129183] LR is at spi_transfer_one_message+0x14c/0x3cc
[   56.134579] pc : [<ffffff80084c5e14>] lr : [<ffffff80084c1e28>] pstate: 60000145
[   56.141965] sp : ffffffc0ef5e3910
[   56.145275] x29: ffffffc0ef5e3910 x28: ffffff8008d01000
[   56.150617] x27: ffffffc0ef5e3c10 x26: ffffff8008bec000
[   56.155959] x25: ffffff8008bec000 x24: 0000000000000000
[   56.161300] x23: 0000000000082c01 x22: 0000000000000000
[   56.166641] x21: 0000000000000001 x20: 00000000000f0000
[   56.171982] x19: ffffffc0f0a45610 x18: 0000000000000000
[   56.177323] x17: 0000007faa81ca00 x16: ffffff80081a9dec
[   56.182664] x15: 00000000000000e7 x14: 0000000000000050
[   56.188005] x13: 2d2d2d2d2d2d2d2d x12: 2d2d2d2d2d2d2d2d
[   56.193346] x11: 2d2d2d2d2d2d2d2d x10: 0000007ffa1ad758
[   56.198687] x9 : 0000000000000000 x8 : ffffffc0ef5e3c70
[   56.204028] x7 : 0000000000000004 x6 : 0000000000000002
[   56.209369] x5 : 0000000000000000 x4 : 0000000000000001
[   56.214709] x3 : 0000000000082c01 x2 : 0000000000000001
[   56.220050] x1 : 00000000000f0000 x0 : 00000000ffffffff
[   56.225392]
[   56.225392] PC: 0xffffff80084c5d94:
[   56.230354] 5d94  f9402a61 f9401262 cb000021 3940e264 2a0103f4 91007040 b9400003 b9402a60
[   56.238695] 5db4  91100042 4b030000 53001c83 9ac30c21 6b01001f 1a819000 51000400 3100041f
[   56.247033] 5dd4  540004e1 f9402e60 b40001c0 f9403261 cb000021 f9401260 2a0103f4 91008000
[   56.255372] 5df4  b9400000 3940e262 9ac20c21 6b01001f 1a813000 51000400 3100041f 54000441
[   56.263711] 5e14  d503203f 35fffbb4 f9402660 b40001e0 90003b00 f9401263 91009063 f940e002
[   56.272048] 5e34  91001442 b9400061 36000101 f940e001 cb010041 b6ffff81 d0002d01 f9400260
[   56.280387] 5e54  91274421 97fdb145 f9401260 52800001 91002000 b9000001 17ffff06 7100049f
[   56.288726] 5e74  f9402661 540000c1 39400025 b9000045 8b030021 f9002661 17ffffd0 79400025
[   56.297066]



I was able to dd from /dev/mtd0 and inspected the dump and it's mostly FFs. Binwalk can't find anything inside - which is wrong...
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Re: SPI boot by phase my progress

Unread postby hominoid » Tue Apr 17, 2018 11:47 pm

FYI, I have been using the HK wiki N1 u-boot cross compile build setup to compile the modified u-boot git repository that @joy posted. Still end up in the same boot loop. I reexamined the native kernel build that I'm doing on the N1 and didn't see any obvious problems. also repeated the whole process on an SDCard with the same results. It looks like my build from the post further up was probably ok. Time to go off the ranch; so I have been digging into u-boot code to try and get a better understanding whats going on. I'll post if I find anything interesting.
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Re: SPI boot by phase my progress

Unread postby mad_ady » Wed Apr 18, 2018 1:41 am

Are you able to read the mtd with dd from linux and analyze it with binwalk?
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Re: SPI boot by phase my progress

Unread postby hominoid » Wed Apr 18, 2018 3:16 am

mad_ady wrote:Are you able to read the mtd with dd from linux and analyze it with binwalk?

I 'll give it a try this evening and let you know what I find. I was tearing it up until late last night trying different things so I need to re-stage my setup again.
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Re: SPI boot by phase my progress

Unread postby hominoid » Wed Apr 18, 2018 12:27 pm

I used hexdump -C /dev/mtd0 to look at the SPI-NOR and it does not contain what was written to it. I had been reading last night about the /etc/fw_env.config file, the one that @umiddelb mention today in the other thread, and how to read and set the env space from linux user space. I used the following entries to read the env space; they were not correct:
/dev/mtd0 0x140000 0x2000
Here is what I was reading:

/etc/fw_env.config
Configuration file for fw_(printenv/setenv) utility. Up to two entries are valid, in this case the redundant
environment sector is assumed present. Notice, that the "Number of sectors" is not required on NOR and SPI-dataflash.
Futhermore, if the Flash sector size is ommitted, this value is assumed to be the same as the Environment size, which is valid for NOR and SPI-dataflash.
Code: Select all
MTD device name   Device offset   Env. size   Flash sector size   Number of sectors
dev/mtd1                 0x0                 0x2000     0x1000                 2

Today I used printenv within u-boot after loading the files but prior to rebooting and it showed this:
Code: Select all
# printenv
arch=arm
baudrate=115200
board=odroidn1
board_name=odroidn1
bootcmd=cfgload; run setbootargs; mmc dev ${bootdev}; load mmc ${bootdev} 0x02000000 Image; load mmc ${bootdev} 0x040000
bootdelay=2
bootdev=1
cpu=armv8
fdtcontroladdr=f5f251f0
fileaddr=400000
filesize=52ba6f
loadaddr=0x400000
setbootargs=setenv bootargs earlyprintk swiotlb=1 console=ttyFIQ0,115200n8 rw root=/dev/mmcblk1p2 rootfstype=ext4 rootw}
soc=rockchip
stderr=serial@ff1a0000
stdin=serial@ff1a0000
stdout=serial@ff1a0000
storagemedia=sd
vendor=rockchip

Using hexdump on the load area for idbspl.bin after rebooting and comparing it to the compiled file it was not correct. It appears that I'm not writing out what is being loaded eventhough it says it wrote the file. Again, using hexdump after the flash_eraseall /dev/mtd0, sometimes its erased and sometimes It's not erased correctly. During one erase cycle the kernel threw out a bunch of errors. This seems to me to say the kernel and/or my hardware setup has a problem. I need to do more reading.
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Re: SPI boot by phase my progress

Unread postby phaseshifter » Thu Apr 19, 2018 12:32 am

can any body tell me how to add this to the kernel build process pls...

In order to compile for sd/emmc and sign the image (directly on the N1), I installed qemu and recompiled the kernel for BINFMT_MISC support: CONFIG_BINFMT_MISC=y. I also added KEXEC support (CONFIG_KEXEC_CORE=y,CONFIG_KEXEC=y). You need to reboot into the new kernel
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Re: SPI boot by phase my progress

Unread postby mad_ady » Thu Apr 19, 2018 1:19 am

Run make menuconfig in the kernel source directory and search for them there (press / to search)
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Re: SPI boot by phase my progress

Unread postby phaseshifter » Thu Apr 19, 2018 1:44 am

ok i cannot find those entries ...i am in the linux-odroid.114 dir run menu config hit search enter the command /s and it does not find any thing ...any further ideas on this ..
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Re: SPI boot by phase my progress

Unread postby mad_ady » Thu Apr 19, 2018 2:44 am

Just search for BINFMT (without CONFIG - all of them are prefixed with config). It should show you where in the tree you can find it. When done you can grep for them in .config to make sure they are set to Y.
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Re: SPI boot by phase my progress

Unread postby phaseshifter » Thu Apr 19, 2018 3:25 am

ok i found this and changed it to "y".. CONFIG_BINFMT_MISC=y.

but the config_kexec files i must have got wrong..it threw errors when i tried to remake the kernel..

i may need more help finding these 2 entries...
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Re: SPI boot by phase my progress

Unread postby mad_ady » Thu Apr 19, 2018 4:21 am

KEXEC_CORE is on by default. The other one is under Kernel features I think, but I don't remember.
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Re: SPI boot by phase my progress

Unread postby mad_ady » Tue Apr 24, 2018 5:35 pm

I did a little experiment with writing data to the flash chip and reading it back from linux. I generated a 64k file with random data, erased the flash and wrote it to an offset in the flash and then read it back.The data I got back is truncated, though the file is the same size:
Code: Select all
root@n1-pre:~# flash_eraseall /dev/mtd0
flash_eraseall has been replaced by `flash_erase <mtddev> 0 0`; please use it
Erasing 4 Kibyte @ fff000 -- 100 % complete
root@n1-pre:~# dd if=/dev/urandom of=random_garbage.bin bs=4096 count=16
16+0 records in
16+0 records out
65536 bytes (66 kB, 64 KiB) copied, 0.032628 s, 2.0 MB/s
root@n1-pre:~# od random_garbage.bin | head
0000000 100335 052771 070615 163464 173251 111014 041622 136144
0000020 013700 033113 151751 037743 120137 167133 113702 007145
0000040 074143 056622 135747 030772 001372 051152 064333 030035
0000060 170772 172567 031125 024440 114001 172376 013577 015711
0000100 144216 126637 002136 151674 011570 112047 054166 073303
0000120 022327 110352 142042 026432 037023 034216 030642 046205
0000140 016713 055641 164570 125405 165231 160351 173727 050053
0000160 126472 003642 143230 016265 041473 067403 142454 155251
0000200 173633 066522 135455 122547 011056 115275 135263 164404
0000220 066307 047411 042502 000370 073141 016222 117523 144602
root@n1-pre:~# dd if=random_garbage.bin of=/dev/mtd0 bs=4096 seek=16
16+0 records in
16+0 records out
65536 bytes (66 kB, 64 KiB) copied, 0.162831 s, 402 kB/s
root@n1-pre:~# dd if=/dev/mtd0 of=read_back.bin bs=4096 skip=16 count=16
16+0 records in
16+0 records out
65536 bytes (66 kB, 64 KiB) copied, 0.0426277 s, 1.5 MB/s
root@n1-pre:~# od read_back.bin | head
0000000 100335 052771 070615 163464 173251 111014 041622 136144
0000020 013700 033113 151751 037743 120137 167133 113702 007145
0000040 074143 056622 135747 030772 001372 051152 064333 030035
0000060 170772 172567 031125 024440 114001 172376 013577 015711
0000100 144216 126637 002136 151674 011570 112047 054166 073303
0000120 022327 110352 142042 026432 037023 034216 030642 046205
0000140 016713 055641 164570 125405 165231 160351 173727 050053
0000160 126472 003642 143230 016265 041473 067403 142454 155251
0000200 173633 066522 135455 122547 011056 115275 135263 164404
0000220 066307 047411 042502 000370 073141 016222 117523 144602
root@n1-pre:~# diff random_garbage.bin read_back.bin
Binary files random_garbage.bin and read_back.bin differ
root@n1-pre:~# ls -l read_back.bin
-rw-r--r-- 1 root root 65536 Apr 24 11:19 read_back.bin
root@n1-pre:~# ls -l random_garbage.bin
-rw-r--r-- 1 root root 65536 Apr 24 11:16 random_garbage.bin


The differences start appearing from 24k inside the file - the data read back is only FFs (there are some sections where there is data afterwards, but briefly):
Image
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Re: SPI boot by phase my progress

Unread postby mad_ady » Tue Apr 24, 2018 6:47 pm

Edit: New experiment:
1. Read the written data in 4k chunks in separate files and merge the files together:
Code: Select all
root@n1-pre:~# for i in `seq 0 15`; do echo $i; skip=$(echo 16+$i|bc); dd if=/dev/mtd0 of=rb$i.bin bs=4096 skip=$skip count=1; done
root@n1-pre:~# cat rb0.bin rb1.bin rb2.bin rb3.bin rb4.bin rb5.bin rb6.bin rb7.bin rb8.bin rb9.bin rb10.bin rb11.bin rb12.bin rb13.bin rb14.bin rb15.bin > rb_read.bin
root@n1-pre:~# dhex random_garbage.bin rb_read.bin
root@n1-pre:~# dhex read_back.bin rb_read.bin


If you compare the chunked read file with the original data it looks like more data has been read than the first time. You can see the same think if comparing with the previously read file.

2. Same as above, but with 1s sleeps between dd calls (rate limit):
Code: Select all
for i in `seq 0 15`; do echo $i; sleep 1; skip=$(echo 16+$i|bc); dd if=/dev/mtd0 of=rb$i.bin bs=4096 skip=$skip count=1; done
cat rb0.bin rb1.bin rb2.bin rb3.bin rb4.bin rb5.bin rb6.bin rb7.bin rb8.bin rb9.bin rb10.bin rb11.bin rb12.bin rb13.bin rb14.bin rb15.bin > rb_read.bin


The read data is still not complete.

Test 3. Write data in 4k chunks and read it back with 10s delay.
Code: Select all
flash_eraseall /dev/mtd0
for i in `seq 0 15`; do echo $i; sleep 10; seek=$(echo 16+$i|bc); dd if=random_garbage.bin of=/dev/mtd0 bs=4096 seek=$seek skip=$i count=1; done
for i in `seq 0 15`; do echo $i; sleep 10; skip=$(echo 16+$i|bc); dd if=/dev/mtd0 of=rb$i.bin bs=4096 skip=$skip count=1; done
cat rb0.bin rb1.bin rb2.bin rb3.bin rb4.bin rb5.bin rb6.bin rb7.bin rb8.bin rb9.bin rb10.bin rb11.bin rb12.bin rb13.bin rb14.bin rb15.bin > rb_read.bin
diff random_garbage.bin rb_read.bin


And behold - the data is read back correctly. So we need to add rate limit to writing and reading from the nand flash...
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Re: SPI boot by phase my progress

Unread postby rooted » Tue Apr 24, 2018 9:17 pm

Nice work.
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Re: SPI boot by phase my progress

Unread postby mad_ady » Sat May 05, 2018 12:05 am

I put together a small bash script to read and write from the NAND in 4k chunks with 10s of sleeps inbetween. This should allow you to read and write data to the flash without issues. I didn't have time to write and boot anything yet, but give it a try and see where it goes:
Code: Select all
# git clone https://github.com/mad-ady/n1-spi-flash.git
# cd n1-spi-flash
root@n1-pre:/home/odroid/n1-spi-flash# flash_eraseall /dev/mtd0                                                                                                                                               
flash_eraseall has been replaced by `flash_erase <mtddev> 0 0`; please use it
Erasing 4 Kibyte @ fff000 -- 100 % complete

### Writing a file to flash from offset byte 32768 (needs to be a multiple of 4k)
root@n1-pre:/home/odroid/n1-spi-flash# ./flash-spi /root/random_garbage.bin /dev/mtd0 32768
Preparing to write...
File /root/random_garbage.bin is 65536 bytes and 16 4096 byte size blocks
Starting to write to /dev/mtd0 from offset 32768...
................

# Reading 16 4k blocks from mtd0 from offset 32768 and writing them to /root/random_garbage_read.bin
root@n1-pre:/home/odroid/n1-spi-flash# ./flash-spi /dev/mtd0 /root/random_garbage_read.bin 32768 16
Preparing to read...
................

### compare both files
root@n1-pre:/home/odroid/n1-spi-flash# cmp /root/random_garbage.bin /root/random_garbage_read.bin
root@n1-pre:/home/odroid/n1-spi-flash# echo $?
0



Let me know what you manage to do with it. I will revisit it when I have some time, but it may be a month or so before I manage...

Maybe I should change the offset to be in 4k blocks as well, and not in bytes, for easier readability.
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Re: SPI boot by phase my progress

Unread postby phaseshifter » Sun May 06, 2018 5:13 pm

i managed to flash the data to the chip but i don`t know the code to get it to read back..
should it read back auto after flashing..??

i also have not managed to do the kernel rebuild with the extra param`s that need to be modded..

also i did go back on your notes to dd to make the files..maybe i`m doing something wrong...
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Re: SPI boot by phase my progress

Unread postby mad_ady » Sun May 06, 2018 7:17 pm

You don't need to read it back - you can if you want to check that it is ok. We need to convert the uboot flash commands into something reasonable for this tool. I'll try to have a look next week.
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Re: SPI boot by phase my progress

Unread postby mad_ady » Mon May 07, 2018 11:35 pm

I'm testing writing and booting the kernel from SPI with this custom script used for writing, but the process of writing is taking hours... Here are the commands if you want to try it (it hasn't finished yet):
Code: Select all
date
./flash-spi /media/boot/idbspl.bin /dev/mtd0 32768
./flash-spi /media/boot/u-boot.itb /dev/mtd0 262144
./flash-spi /media/boot/Image.gz /dev/mtd0 1318912
./flash-spi /media/boot/rk3399-odroidn1-linux.dtb /dev/mtd0 8658944
./flash-spi /media/boot/uInitrd /dev/mtd0 8730624
date

I just converted the uboot commands and their hex offsets to decimal offsets. It should work the same way. Not sure where boot.ini would be loaded from, or what environment would be used (there would need to be a place where to store the offsets of the kernel, dtb, uInitrd. We'll see if uboot boots at least.

I've also attached the kernel I use (needs to be uncompressed in /media/boot, and the modules in /lib/modules, after you've made the appropriate backup): http://www.mediafire.com/file/o3kzg9ajg ... el.tar.bz2
Here is the kernel config: http://paste.ubuntu.com/p/Qthtm9PpF8/ if you want to build it yourself.
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Re: SPI boot by phase my progress

Unread postby phaseshifter » Tue May 08, 2018 7:26 am

Code: Select all
./flash-spi /media/boot/uInitrd /dev/mtd0 8730624

Offset 8730624 is not a multiple of 4096

throwing an error

so i dont know why but the u-bbot does seem to kick in but i get an mmc could not read from device..so as far as the u-boot goes i think that it is ok ..just the last line of code that wont except ..even when i did the math 8730624 seems to be correct..dunno..so i could not load the last line above
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