I let myself reply to this subject but I think that my colleague and I found an acceptable solution and I would like to ask your thoughts about it.
On some search on the meson driver implementation, we have found the following function :
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#define ENCI_INFO_READ 0x271C
#define ENCP_INFO_READ 0x271D
/* Returns the current ENCI field polarity */
unsigned int meson_venci_get_field(struct meson_drm *priv)
return readl_relaxed(priv->io_base + _REG(ENCI_INFO_READ)) & BIT(29);
These registers are not defined in the S905
documentation (that, in my opinion, is very incomplete) but are in the documentation of the S905x and S912
amlogic chip (a newer version of the chip
Moreover, on the documentation of the meson on www.kernel.org
), the information concerning the VPU
is described with the following sentence :
Pixel data arrives in 4:4:4 format from the VENC block and the VPU HDMI mux selects either the ENCI encoder for the 576i or 480i formats or the ENCP encoder for all the other formats including interlaced HD formats. The VENC uses a DVI encoder on top of the ENCI or ENCP encoders to generate DVI timings for the HDMI controller.
The bit 29 of these two registers seems to be what we need to perform a check on which Vsync (either odd or even) we process each of the two fields.
A quick check of the value shows us that the bit 29 seems to toggle on a frequency of 2*Vsync on the register ENCI_INFO_READ
keeps the same value) and ENCP_INFO_READ
for other formats (ENCI_INFO_READ
keeps the same value for such format).
These two registers are in the VPU
register space (0xD0100000
If we implement our vsync based on the following pseudo-code :
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if(VideoFormat.FrameType == VIDEO_FRAME_TYPE_INTERLEAVED && GetFieldStatus() == VIDEO_FIELD_TYPE_ODD)
where the function GetFieldStatus() is the value (((0xD0100000 + 0x271C) & 0x20000000) >> 29)
formats and (((0xD0100000 + 0x271D) & 0x20000000) >> 29)
formats. It seems to work during my test of this afternoon and it seems that is the correct way to implement a frame rate Vsync
for interlaced format on an Odroid C2 platform.
Does the path we follow seem correct to you?