HDMI Vsync based on frame rate for interleaved video format

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Isard7777
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HDMI Vsync based on frame rate for interleaved video format

Unread post by Isard7777 » Tue Feb 12, 2019 3:17 am

Hello,

Sorry if it already exists a topic about that but I didn't find it. I know how to change the format of the screen where the odroid is plugged through the HDMI cable (on Ubuntu 18.04 minimal provided by odroid) but, when I select an interleaved HDMI format like this in command line:

Code: Select all

echo 1080i50hz > /sys/class/display/mode && fbset -xres 1920 -vxres 1920 -yres 1080 -vyres 2160
The result I can see when I perform this is that the frame buffer is well set and have a value of the Vsync equals to 50hz which is the field rate for interlaced format :

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fbset

mode "1920x1080-51"
    # D: 74.250 MHz, H: 28.125 kHz, V: 51.044 Hz
    geometry 1920 1080 1920 2160 32
    timings 13468 148 528 15 2 44 5
    laced true
    nonstd 1
    rgba 8/16,8/8,8/0,0/24
endmode
The problem is that I would like to perform my frame processing at the frame rate (25hz) and not at the field rate. I have tried to disable the laced option

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fbset -laced 0
but no effect to the call of

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ioctl(mFbFd_i, FBIO_WAITFORVSYNC, 0)
in a C code has been detected and the Vsync remains the same (50hz).

Do you know how I can change the Vsync value only for interleaved format to perform a process based on frame rate?

Thanks.
Last edited by Isard7777 on Tue Feb 12, 2019 7:26 pm, edited 2 times in total.

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Re: HDMIn Vsync for interleaved format

Unread post by odroid » Tue Feb 12, 2019 3:55 pm

I have no idea. :(
I hope other forum users can help you.

Isard7777
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Re: HDMI Vsync based on frame rate for interleaved video format

Unread post by Isard7777 » Wed Feb 13, 2019 3:06 am

If it is not possible to do that, exists it a way to know if we are on a vsync associated to an odd field or an even field ?

Because if I have no solution to do that, it happens that I have a desynchronisation between odd and even field in my process if I miss a vsync or when I begin to display the video on the wrong one.

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Re: HDMI Vsync based on frame rate for interleaved video format

Unread post by Isard7777 » Wed Feb 20, 2019 12:43 am

Hello,

I let myself reply to this subject but I think that my colleague and I found an acceptable solution and I would like to ask your thoughts about it.

On some search on the meson driver implementation, we have found the following function :

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[...]
#define ENCI_INFO_READ  0x271C
#define ENCP_INFO_READ 0x271D
[...]
/* Returns the current ENCI field polarity */
unsigned int  meson_venci_get_field(struct meson_drm *priv)
{
	return readl_relaxed(priv->io_base + _REG(ENCI_INFO_READ)) & BIT(29);
}
These registers are not defined in the S905 documentation (that, in my opinion, is very incomplete) but are in the documentation of the S905x and S912 amlogic chip (a newer version of the chip).

Moreover, on the documentation of the meson on www.kernel.org (https://www.kernel.org/doc/html/v4.16/gpu/meson.html), the information concerning the VPU is described with the following sentence :
Pixel data arrives in 4:4:4 format from the VENC block and the VPU HDMI mux selects either the ENCI encoder for the 576i or 480i formats or the ENCP encoder for all the other formats including interlaced HD formats. The VENC uses a DVI encoder on top of the ENCI or ENCP encoders to generate DVI timings for the HDMI controller.
The bit 29 of these two registers seems to be what we need to perform a check on which Vsync (either odd or even) we process each of the two fields.

A quick check of the value shows us that the bit 29 seems to toggle on a frequency of 2*Vsync on the register ENCI_INFO_READ for SD formats (ENCP_INFO_READ keeps the same value) and ENCP_INFO_READ for other formats (ENCI_INFO_READ keeps the same value for such format).

These two registers are in the VPU register space (0xD0100000 start address).

If we implement our vsync based on the following pseudo-code :

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void WaitForSync()
{
	WaitForVsync();

	if(VideoFormat.FrameType == VIDEO_FRAME_TYPE_INTERLEAVED && GetFieldStatus() == VIDEO_FIELD_TYPE_ODD)
		WaitForVsync();
}
where the function GetFieldStatus() is the value (((0xD0100000 + 0x271C) & 0x20000000) >> 29) for SD formats and (((0xD0100000 + 0x271D) & 0x20000000) >> 29) for HD formats. It seems to work during my test of this afternoon and it seems that is the correct way to implement a frame rate Vsync for interlaced format on an Odroid C2 platform.

Does the path we follow seem correct to you?

Thanks.

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Re: HDMI Vsync based on frame rate for interleaved video format

Unread post by crashoverride » Wed Feb 20, 2019 11:26 am

When using an interlaced video mode. All even lines will apply to a field and all odd lines will apply to the other field. The Vsync indicates completion of the two fields (even and odd). To process video data for a field, simply skip every other line (double the stride and half the vertical resolution).

[edit]
I was confusing something else with this.

At 1080i@60, each field is 1/60s and each frame is 1/30s. So, yes, you will need to inquire which field is active from the registers. However, the data displayed is consistently from either the even or odd lines in the framebuffer.

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