C1+ and couple of SPI devices

Moderators: mdrjr, odroid

C1+ and couple of SPI devices

Unread postby Zaren » Fri Mar 09, 2018 3:43 pm

Hello!

I have the working spi canbus shield. It uses kernel driver and makes the can0 device in system.
Also I tried spi nrf radio module and its works. But right now works only one of them due to having some configuration in dts file. The can shield needs its his own section in dts file. Radio module needs just /dev/spidev0 and spidev section in dts file. If I turn on the can section the spidev is disappered. The canbus works. If I commented the can bus section the spidev is up and radio module works.
Thus, they except each other. Here is dmesg output with can section turned on:
Code: Select all
[    6.436286] spicc spicc: master is unqueued, this is deprecated
[    6.454236] CAN device driver interface
[    6.464934] spi spi0.0: spicc_setup : spi->bits_per_word = 8, spi->max_spped_hz = 10000000, spi->chip_select = 0, spi->mode = 0x00
[    6.489488] mcp251x spi0.0: probed
[    6.496368] systemd[1]: Starting Remount Root and Kernel File Systems...
[    6.507630] spicc spicc: chipselect 0 already in use
[    6.510266] spi_master spi0: spi_device register error /spi@c1108d80/spidev@0
[    6.533193] EXT4-fs (mmcblk0p2): re-mounted. Opts: errors=remount-ro
[    6.543932] spi spi0.1: spicc_setup : spi->bits_per_word = 8, spi->max_spped_hz = 1000000, spi->chip_select = 1, spi->mode = 0x00
[    6.555148]  reg:2620,clearmask=10001,setmask=10001

It is possible to have both of them?

I would be very appreciate of any hints =)
Thanks
Zaren
 
Posts: 39
Joined: Wed Nov 08, 2017 7:12 am
Location: Poland
languages_spoken: english
ODROIDs: ODROID C1+, XU4

Re: C1+ and couple of SPI devices

Unread postby cap00k » Mon Mar 12, 2018 11:53 am

Hi, Zaren
I assume that you do not use the spi touch screen driver.
Currently there are two cs gpio in the spicc driver.
First remove the spi touch driver from the dts file.
Then modify the dts file as shown below.
Code: Select all
    spi@c1108d80 {
        #address-cells = <1>;
        #size-cells = <0>;
        compatible = "amlogic,spicc";
        dev_name = "spicc";
        status = "okay";
        reg = <0xc1108d80 0x28>;
        pinctrl-names="default";
        pinctrl-0=<&aml_spicc_pins>;
        device_id = <0>;
        num_chipselect = <2>;
        cs_gpios = "GPIOX_20", "GPIOX_21";

        can0: mcp2515@1 {
            compatible = "microchip,mcp2515";
            reg = <1>;
            spi-max-frequency = <10000000>;
            irq-falling = <1>;
            irq-gpio = "GPIOY_3";
        };
        spidev@0 {
            spi-max-frequency = <2000000>;
            compatible = "spidev";
            reg = <0>;
        };
    };


The hardware connection
can device chip select : GPIOX_21
nrf radio module chip select : GPIOX_20

I think that will probably allow us to use both devices.
cap00k
 
Posts: 60
Joined: Tue May 21, 2013 10:46 am
languages_spoken: english
ODROIDs: ODROID

Re: C1+ and couple of SPI devices

Unread postby Zaren » Mon Mar 12, 2018 2:19 pm

Hello, thanks for your reply

I'm going to use in my car touch screen also. It will be three spi devices : screen,can and nrf.
As far I understand I can just add once more gpio to list.
Code: Select all
num_chipselect = <3>;
cs_gpios = "GPIOX_20", "GPIOX_21", "GPIOX_22";


Is it enough to change dts file like this?
Zaren
 
Posts: 39
Joined: Wed Nov 08, 2017 7:12 am
Location: Poland
languages_spoken: english
ODROIDs: ODROID C1+, XU4

Re: C1+ and couple of SPI devices

Unread postby Zaren » Sun Mar 25, 2018 1:13 am

Hi,
I got the /dev/spidev0.2 device.
I just changed line of code as I wrote above. But with 22 my C1+ lost ethernet. I changed from 22 to 12 and it is worked out.

Right now it is looks like
Code: Select all
num_chipselect = <3>;
cs_gpios = "GPIOX_20", "GPIOX_21", "GPIOX_12";
....
spidev@0
reg = <2>;


What it means with 22 lost ethernet? I didn't find in dts file the engaged 22 gpio like 12
Zaren
 
Posts: 39
Joined: Wed Nov 08, 2017 7:12 am
Location: Poland
languages_spoken: english
ODROIDs: ODROID C1+, XU4

Re: C1+ and couple of SPI devices

Unread postby Zaren » Sun Mar 25, 2018 3:11 am

Where I can get the GPIOX_12 in pins layout as chip enable for the second device?
Zaren
 
Posts: 39
Joined: Wed Nov 08, 2017 7:12 am
Location: Poland
languages_spoken: english
ODROIDs: ODROID C1+, XU4

Re: C1+ and couple of SPI devices

Unread postby joerg » Sun Mar 25, 2018 3:32 am

Hi Zaren, according the S805 datasheet and the schematics, both GPIOX_22 and GPIOX_12 are not existing. You need to select one that it is exposed to the 40 pin header https://wiki.odroid.com/odroid-c1/hardware/expansion_connectors. E.g. the GPIOX_6 can be used (if the pin is not used for something else).
joerg
 
Posts: 797
Joined: Tue Apr 01, 2014 2:14 am
Location: Germany
languages_spoken: german, english, español
ODROIDs: C1, C1+, C2

Re: C1+ and couple of SPI devices

Unread postby Zaren » Sun Mar 25, 2018 6:42 am

Thanks!
It's worked out. Right now I have both of SPI devices. =)
Zaren
 
Posts: 39
Joined: Wed Nov 08, 2017 7:12 am
Location: Poland
languages_spoken: english
ODROIDs: ODROID C1+, XU4

Re: C1+ and couple of SPI devices

Unread postby Zaren » Sun Mar 25, 2018 7:28 pm

By the way, my hardware power consumption is around 15mA. It is connected to 3.3V pin of my C1+. Could C1+ power pin stand with it?

Thanks for help!
Zaren
 
Posts: 39
Joined: Wed Nov 08, 2017 7:12 am
Location: Poland
languages_spoken: english
ODROIDs: ODROID C1+, XU4

Re: C1+ and couple of SPI devices

Unread postby joerg » Sun Mar 25, 2018 9:14 pm

I think that the C1 can support this 15mA. As I heard other users have connected a 5V fan to the 3.3V pin and this for sure take more than 15mA.
But may someone else can correct me, if I am wrong.
joerg
 
Posts: 797
Joined: Tue Apr 01, 2014 2:14 am
Location: Germany
languages_spoken: german, english, español
ODROIDs: C1, C1+, C2

Re: C1+ and couple of SPI devices

Unread postby Zaren » Mon Mar 26, 2018 6:46 am

Thanks for your answer, it is great!

One more question about SPI. As far I understand in my case of SPI the processor is a master and nrf, mcp2515 are slaves.
I want to make some software which will read/send some data through slaves queue. There is some switch which carry out this queue by setting GPIO pins (CE0,CE1) to 1 or 0.
The question is who make this switch? Do I have to make one inside my code? or it is the system already implemented and managed those GPIO's?
Zaren
 
Posts: 39
Joined: Wed Nov 08, 2017 7:12 am
Location: Poland
languages_spoken: english
ODROIDs: ODROID C1+, XU4


Return to Ubuntu

Who is online

Users browsing this forum: No registered users and 3 guests